Chien-Chao Huang

This inventor holds 51 USPTO granted patents, primarily in Semiconductor Devices (CPC class H01L). Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., National Applied Research Laboratories. Active years: 2004-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chien-Chao Huang. Retrieved from https://idiyas.com/inventor/chien-chao-huang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 51

% Patents Active = 66.7

Average Co-Inventor Count = 3.2

ph-index = 12

Forward Citations = 767(Granted Patents)

Forward Citations (Not Self Cited) = 765(Dec 10, 2025)

Inventors with similar research interests:

Location History:

Hisn-Chu, TW (2006)
Hsin-Chin, TW (2008)
Hsin-Chu, TW (2004 - 2022)

Company Filing History:

50 out of 42,926

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

1 out of 240

National Applied Research Laboratories

patents

Years Active: 2004-2022

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Areas of Expertise:

Silicon-Germanium Layer

Strained Silicon

CMOS Technology

Cobalt Silicidation

Transistor Mobility

Shallow Trench Isolation

Optical Devices

Microelectronic Devices

Semiconductor Flash

High Performance Design

Phase Change Memory

Aluminum Conductor

51 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11380762 - Semiconductor device having semiconductor alloy layer adjacent a gate structure (2022-07-05),

2. 10818754 - Semiconductor device with silicided source/drain region (2020-10-27),

3. 10446646 - Cobalt silicidation process for substrates comprised with a silicon-germanium layer (2019-10-15),

4. 9905474 - CMOS device with raised source and drain regions (2018-02-27),

5. 9673280 - Cobalt silicidation process for substrates comprised with a silicon-germanium layer (2017-06-06),

6. 8847253 - Programming optical device (2014-09-30),

7. 8835291 - Strained gate electrodes in semiconductor devices (2014-09-16),

8. 8792078 - Method and pellicle mounting apparatus for reducing pellicle induced distortion (2014-07-29),

9. 8679728 - Method for fabricating patterned layer (2014-03-25),

10. 8569845 - Strained silicon device (2013-10-29),

11. 8564018 - Relaxed silicon germanium substrate with low defect density (2013-10-22),

12. 8319962 - Mask making decision for manufacturing (DFM) on mask quality control (2012-11-27),

13. 8288842 - Method for dicing semiconductor wafers (2012-10-16),

14. 8120767 - Mask making decision for manufacturing (DFM) on mask quality control (2012-02-21),

15. 8008157 - CMOS device with raised source and drain regions (2011-08-30),

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Title: Pioneering Inventor Chien-Chao Huang: Revolutionizing Technology Through Innovation

Introduction:

Chien-Chao Huang, a distinguished inventor based in Hsin-Chu, TW, has made remarkable contributions to the global landscape of inventions and patents. With a total of 51 patents to his name, Huang has established himself as a trailblazer in the field of technology.

Latest Patents:

Chien-Chao Huang's latest patents include "Semiconductor device having semiconductor alloy layer adjacent a gate structure" and "Semiconductor device with silicided source/drain region." These inventions showcase his expertise in semiconductor technology and his commitment to advancing the field.

Career Highlights:

Throughout his career, Chien-Chao Huang has worked with leading companies such as Taiwan Semiconductor Manufacturing Company Ltd. and National Applied Research Laboratories. His innovative spirit and dedication to his work have earned him a reputation as a visionary in the industry.

Collaborations:

Huang has collaborated with esteemed colleagues such as Fu-Liang Yang and Chenming Hu. Together, they have pushed the boundaries of technology and have spearheaded groundbreaking projects in the field of semiconductors.

Conclusion:

In conclusion, Chien-Chao Huang's passion for innovation and his relentless pursuit of excellence have solidified his legacy as a pioneering inventor. His contributions to technology have not only revolutionized the industry but have also inspired future generations of inventors to push the boundaries of what is possible.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]