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For the Inventor, By the Inventor

Xinpu, Taiwan

Chia-Pin Lin

This inventor holds 96 USPTO granted patents and 52 published patent applications, primarily in Semiconductor Devices (CPC class H01L29-42392). Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., National Science Council. Active years: 2004-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chia-Pin Lin. Retrieved from https://idiyas.com/inventor/chia-pin-lin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 96 

% Patents Active = 94.8

Average Co-Inventor Count = 4.0

ph-index = 10

Forward Citations = 293(Granted Patents)

Forward Citations (Not Self Cited) = 255(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Hsinchu, TW (2004 - 2024)
  • Xinpu Township, Hsinchu County, TW (2011 - 2024)
  • Hsinchu County, TW (2012 - 2024)
  • Xinpu Township, TW (2013 - 2024)

Company Filing History:

goldMedal95 out of 43,553 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal1 out of 544 
 
National Science Council
 patents

Years Active: 2004-2026

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Areas of Expertise:
Semiconductor Structure
Gate-All-Around Transistor
Carrier Mobility
Epitaxial Features
Multi-Gate Devices
Source/Drain Engineering
Air Gap Spacer
Integrated Circuit
Nanosheet Devices
Low Resistance Contact
Leakage Current Suppression
Backside Via
96 patents (USPTO):Explore Patents
1. 12751075 - Isolation features for semiconductor devices and methods of fabricating the same (2026-09-29),
2. 12720811 - Lightly-doped channel extensions (2026-08-25),
3. 12684812 - Methods for fabricating semiconductor device having nanostructure transistor with cap layer (2026-07-14),
4. 12666647 - Transistor including bottom isolation and manufacturing method thereof (2026-06-23),
5. 12660244 - Integrated circuit structure with backside via (2026-06-16),
6. 12588283 - Semiconductor structure and related methods (2026-03-24),
7. 12581691 - Methods of manufacturing semiconductor devices and semiconductor devices (2026-03-17),
8. 12543361 - Gate-all-around transistor having inner space lined by a semiconductor liner and method of forming the same (2026-02-03),
9. 12538532 - Method of forming a gap under a source/drain feature of a multi-gate device (2026-01-27),
10. 12527039 - Semiconductor devices with enhanced carrier mobility (2026-01-13),
11. 12520555 - Inner spacer for a multi-gate device and related methods (2026-01-06),
12. 12471306 - Semiconductor device active region profile and method of forming the same (2025-11-11),
13. 12464769 - Semiconductor device with epitaxial bridge feature and methods of forming the same (2025-11-04),
14. 12457770 - Source and drain engineering process for multigate devices (2025-10-28),
15. 12453127 - Methods of manufacturing semiconductor devices and semiconductor devices (2025-10-21),

Title: The Innovative Journey of Chia-Pin Lin

Introduction: Chia-Pin Lin, a talented inventor hailing from Xinpu, Taiwan, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents: Chia-Pin Lin's latest patents include a cutting-edge smart home device that revolutionizes the way we interact with our living spaces, and a sustainable energy solution that aims to reduce carbon emissions.

Career Highlights: With a career spanning over two decades, Chia-Pin Lin has worked for various tech companies, leading research teams and spearheading projects that have pushed the boundaries of technological advancement.

Collaborations: Throughout his career, Chia-Pin Lin has collaborated with top researchers, engineers, and designers from around the world, fostering a culture of innovation and creativity in all his projects.

Conclusion: Chia-Pin Lin's passion for innovation and his relentless drive to create a better future through technology make him a true pioneer in the world of inventions. His work continues to inspire and shape the technological landscape for generations to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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