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Singapore, Singapore

Utac Headquarters Pte. Ltd.

USPTO Granted Patents = 79

Trademarks = 1

Forward Citations = 104

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110 inventors (with patents filed for the assignee):

Saravuth Sirinorakul (29 out of 76 patents)

Suebphong Yenrudee (14 out of 16 patents)

Il Kwon Shim (12 out of 208 patents)

4. Hua Hong Tan (10 out of 11 patents)

5. Dzafir Bin Mohd Shariff (10 out of 10 patents)

6. Nathapong Suthiwongsunthorn (10 out of 37 patents)

7. Roel Adeva Robles (9 out of 10 patents)

8. Jeffrey Punzalan (7 out of 7 patents)

9. Chee Kay Chow (6 out of 6 patents)

10. Kriangsak Sae Le (6 out of 10 patents)

11. Ronnie M De Villa (6 out of 6 patents)

12. Enrique E Sarile, Jr (6 out of 6 patents)

13. Wedanni Linsangan Micla (5 out of 5 patents)

14. Antonio Bambalan Dimaano, Jr (5 out of 32 patents)

15. Somchai Nondhasitthichai (5 out of 35 patents)

Core Competencies:

Semiconductor Device

Clip Bond

Optical Semiconductor Package

Vertical Components

Integrated Shielding

Cavity Wall Structure

Electromagnetic Interference

Multi-Layer Package

Leadframe Technology

Heat Spreader

Image Sensor Package

Conductive Shield

79 patents: Sort by Forward Citations

1. 12772771 - Wafer adaptors, including systems and methods, for adapting different sized wafers (2026-10-20),

2. 12736425 - Semiconductor device and method for sensing external condition in harsh environment (2026-09-15),

3. 12727418 - Plasma diced wafers and methods thereof (2026-09-01),

4. 12707912 - Plasma diced wafers and methods thereof (2026-08-11),

5. 12685087 - Plasma diced wafers and methods thereof (2026-07-14),

6. 12653062 - Semiconductor packages and methods of forming RDL and side and back protection for semiconductor device (2026-06-09),

7. 12642051 - Semiconductor device carriers and methods of making and using (2026-05-26),

8. 12635276 - Semiconductor packages with reliable covers (2026-05-19),

9. 12628597 - Frame mask for singulating wafers by plasma etching (2026-05-12),

10. 12525567 - Semiconductor device and method of forming clip bond having multiple bond line thicknesses (2026-01-13),

11. 12489078 - Semiconductor device and method of disposing electrical components above and below substrate (2025-12-02),

12. 12302657 - Semiconductor device and method of forming an optical semiconductor package with a shield structure (2025-05-13),

13. 12293972 - Semiconductor device and method of forming leadframe with clip bond for electrical interconnect (2025-05-06),

14. 12230615 - Semiconductor packages with vertical passive components (2025-02-18),

15. 12228610 - Illuminator method and device for semiconductor package testing (2025-02-18),

Company Overview

Utac Headquarters Pte. Ltd. is a prominent player in the semiconductor packaging industry, headquartered in Singapore. The company specializes in the development and manufacturing of advanced semiconductor devices, focusing on innovative technologies such as clip bonding, optical semiconductor packages, and vertical components. Utac is dedicated to addressing challenges related to electromagnetic interference and enhancing packaging efficiency through multi-layer designs and cavity wall structures, positioning itself as a leader in the evolving semiconductor landscape.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

79 Patents

#41 in Singapore

#41 in Singapore

#9,588 in the World

Singapore, Singapore

Utac Headquarters Pte. Ltd.

Forward Citations = 104

110 inventors:

Saravuth Sirinorakul (29 out of 76 patents)

Suebphong Yenrudee (14 out of 16 patents)

Il Kwon Shim (12 out of 208 patents)

4. Hua Hong Tan (10 out of 11 patents)

5. Dzafir Bin Mohd Shariff (10 out of 10 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Utac Headquarters Pte. Ltd.. Retrieved from https://idiyas.com/company/utac-headquarters

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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