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For the Inventor, By the Inventor

Dresden, Germany

Ferroelectric Memory Gmbh

Calculating rank
USPTO Granted Patents = 60

% Expired Patents = 1.7


Forward Citations = 397

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20 inventors (with patents filed for the assignee):

goldMedal Johannes Ocker (19 out of 19 patents)

silverMedal Marko Noack (13 out of 13 patents)

bronzeMedal Stefan Müller (9 out of 13 patents)

4.  Stefano Sivero (9 out of 10 patents)

5.  Stefan Ferdinand Müller (6 out of 6 patents)

6.  Menno Mennenga (5 out of 15 patents)

7.  Rashid Iqbal (5 out of 5 patents)

8.  Rolf Jähne (4 out of 4 patents)

9.  Tony Schenk (4 out of 4 patents)

10.  Alessandro Palludo (4 out of 4 patents)

11.  Corrado Villa (3 out of 82 patents)

12.  Patrick Polakowski (2 out of 11 patents)

13.  Fabio Tassan Caser (2 out of 2 patents)

14.  Georgi Kuzmanov (2 out of 2 patents)

15.  Haidi Zhou (1 out of 1 patent)


Core Competencies:
Memory Cell Arrangement
Reading Method
Sensing Circuit
Capacitive Memory
Ferroelectric Memory Circuit
Voltage Supply Circuit
Multi-Stack Structure
Programmable Delays
Self-Adjusting Reference
Memory Device
Threshold Switch Structure
Ternary Memory Cell

60 patents:

1. 12772456 - Memory cell and method for changing properties of an electrode (2026-10-20),
2. 12770668 - Cell operation circuit and memory device (2026-10-20),
3. 12718861 - Memory cell arrangement and method of reading a capacitive memory cell (2026-08-25),
4. 12690197 - Memory cell, memory device, and methods thereof (2026-07-21),
5. 12660200 - Memory cells with lever electrodes and arrangements thereof (2026-06-16),
6. 12592268 - Devices, methods, and systems for calibrating a read voltage used for reading memory cells (2026-03-31),
7. 12562723 - Programmable delays and methods thereof (2026-02-24),
8. 12518813 - Sense counter-pulse for reading state-programmable memory cells (2026-01-06),
9. 12477745 - Memory cell including spontaneously polarizable capacitor structure (2025-11-18),
10. 12464781 - Memory cell, memory cell arrangement, and methods thereof (2025-11-04),
11. 12462861 - Devices, methods, and systems for calibrating a sensing capacitor used in a sensing circuit for reading memory cells (2025-11-04),
12. 12431178 - Low-voltage sense amplifier for reading a state-programmable memory element (2025-09-30),
13. 12360741 - Multiply operation circuit, multiply and accumulate circuit, and methods thereof (2025-07-15),
14. 12334128 - Ferroelectric memory circuit and reading method thereof (2025-06-17),
15. 12283300 - Devices, methods, and systems for a multilevel memory cell (2025-04-21),
Company Overview
Ferroelectric Memory GmbH, based in Dresden, Germany, specializes in the development of advanced ferroelectric memory technologies. The company focuses on innovative solutions in memory cell arrangement, reading methods, and sensing circuits, aiming to enhance the performance and efficiency of memory systems. Their expertise extends to capacitive memory, ferroelectric memory circuits, voltage supply circuits, and multi-stack structures, positioning them at the forefront of next-generation memory solutions.
Profile summary synthesized from public USPTO records and patent filings.

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USPTO Data Jan 1 1976 - Oct 27 2026

Ferroelectric Memory Gmbh USPTO Patent Assignee Logo
60 Patents

#9 in Dresden

#922 in Germany

#12,098 in the World

Dresden, DE
Dresden, Germany

Ferroelectric Memory Gmbh

Forward Citations = 397

20 inventors:

goldMedal Johannes Ocker (19 out of 19 patents)

silverMedal Marko Noack (13 out of 13 patents)

bronzeMedal Stefan Müller (9 out of 13 patents)

4.  Stefano Sivero (9 out of 10 patents)

5.  Stefan Ferdinand Müller (6 out of 6 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Ferroelectric Memory Gmbh. Retrieved from https://idiyas.com/company/ferroelectric-memory

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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