For the Inventor, By the Inventor

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San Jose, CA, United States of America

Adeia Semiconductor Solutions LLC

USPTO Granted Patents = 30

EPO Patents = 1

Forward Citations = 3

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87 inventors (with patents filed for the assignee):

Kangguo Cheng (13 out of 2,869 patents)

Benjamin David Briggs (5 out of 197 patents)

Lawrence Alfred Clevenger (4 out of 696 patents)

4. Fee Li Lie (3 out of 178 patents)

5. Christopher J Penny (3 out of 172 patents)

6. Peng Xu (3 out of 356 patents)

7. Balasubramanian Pranatharthiharan (3 out of 217 patents)

8. John R Sporre (3 out of 3 patents)

9. Junli Wang (2 out of 473 patents)

10. Huai Huang (2 out of 61 patents)

11. Ilyas Mohammed (2 out of 285 patents)

12. Belgacem Haba (2 out of 670 patents)

13. Juntao Li (2 out of 577 patents)

14. Michael Rizzolo (2 out of 211 patents)

15. Takeshi Nogami (2 out of 195 patents)

30 patents: Sort by Forward Citations

1. 12690251 - Method of forming nanosheet field effect transistors with partial inside spacers (2026-07-21),

2. 12685112 - Method of forming copper interconnect structure with manganese barrier layer (2026-07-14),

3. 12628628 - Structure and method to improve FAV RIE process margin and electromigration (2026-05-12),

4. 12622003 - High density three-dimensional integrated capacitors (2026-05-05),

5. 12598786 - Field effect transistor structures (2026-04-07),

6. 12550709 - Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device (2026-02-10),

7. 12550359 - Forming a sacrificial liner for dual channel devices (2026-02-10),

8. 12532682 - Method of manufacturing a structure by asymmetrical ion bombardment of a capped underlying layer (2026-01-20),

9. 12520567 - Hybrid-channel nano-sheet FETs (2026-01-06),

10. 12494453 - Package-on-package assembly with wire bonds to encapsulation surface (2025-12-09),

11. 12488986 - Selective gas etching for self-aligned pattern transfer (2025-12-02),

12. 12482704 - Self-forming barrier for use in air gap formation (2025-11-25),

13. RE50613 - FinFET gate cut after dummy gate removal (2025-09-30),

14. 12402403 - Air gap spacer for metal gates (2025-08-26),

15. 12387983 - Forming self-aligned vias and air-gaps in semiconductor fabrication (2025-08-12),

Adeia Semiconductor Solutions LLC specializes in advanced semiconductor technologies, focusing on innovative solutions for a wide range of electronic applications. By leveraging cutting-edge design methodologies and manufacturing processes, the company aims to enhance performance and efficiency in semiconductor devices. Adeia's expertise spans various sectors including telecommunications, computing, and consumer electronics. The firm is dedicated to driving advancements in silicon technology and improving the overall functionality of integrated circuits. Adeia Semiconductor Solutions LLC is committed to providing high-quality, reliable semiconductor products tailored to meet the evolving needs of modern technology.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Sep 15 2026

30 Patents

#263 in San Jose, CA

#2,672 in California

#11,240 in US

#21,814 in the World

San Jose, CA, United States of America

Adeia Semiconductor Solutions LLC

Forward Citations = 3

87 inventors:

Kangguo Cheng (13 out of 2,869 patents)

Benjamin David Briggs (5 out of 197 patents)

Lawrence Alfred Clevenger (4 out of 696 patents)

4. Fee Li Lie (3 out of 178 patents)

5. Christopher J Penny (3 out of 172 patents)

Please report any incorrect information to [email protected]

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