logo

For the Inventor, By the Inventor

Hsinchu, Taiwan

Zi-Wei Fang

This inventor holds 33 USPTO granted patents and 2 published patent applications, primarily in Semiconductor Devices. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., University of California. Active years: 2015-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Zi-Wei Fang. Retrieved from https://idiyas.com/inventor/zi-wei-fang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 33 

% Patents Active = 87.9

Average Co-Inventor Count = 3.1

ph-index = 3

Forward Citations = 36(Granted Patents)


Location History:

  • Baoshan Township, Hsinchu County, TW (2015)
  • Hsinchu, TW (2017 - 2020)
  • Hsinchu County, TW (2015 - 2024)

Company Filing History:

goldMedal33 out of 42,810 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal1 out of 16,008 
 
University of California
 patents
where one patent can have more than one assignee

Years Active: 2015-2025

Loading Chart...
Areas of Expertise:
Semiconductor Device
FinFET
Interfacial Layer
Nanolaminate Structure
Annealing Methods
Wafer Detection
Silicon Germanium
Tilt Implantation
Fabrication Method
Work Function Material
Conformal Layer
Semiconductor Structure
33 patents (USPTO):Explore Patents
1. 12336269 - Semiconductor device and manufacturing method thereof (2025-06-17),
2. 12283616 - FinFET having a work function material gradient (2025-04-21),
3. 12148843 - Semiconductor device with treated interfacial layer on silicon germanium (2024-11-19),
4. 12107134 - Semiconductor device and fabrication method thereof (2024-10-01),
5. 12057495 - Semiconductor device with conformal source/drain layer (2024-08-06),
6. 12051620 - Semiconductor structure and method for manufacturing the same (2024-07-30),
7. 11915981 - Semiconductor device and manufacturing method thereof (2024-02-27),
8. 11855164 - Semiconductor device and fabrication method thereof (2023-12-26),
9. 11705507 - Semiconductor device and forming method thereof (2023-07-18),
10. 11688812 - Semiconductor device with treated interfacial layer on silicon germanium (2023-06-27),
11. 11373902 - Semiconductor structure and method for manufacturing the same (2022-06-28),
12. 11348837 - Semiconductor device and manufacturing method thereof (2022-05-31),
13. 11282933 - FinFET having a work function material gradient (2022-03-22),
14. 11031508 - Semiconductor device with treated interfacial layer on silicon germanium (2021-06-08),
15. 11024723 - Semiconductor device (2021-06-01),

Title: Inventor Spotlight: Zi-Wei Fang

Introduction:

Zi-Wei Fang is a pioneering inventor based in Hsinchu County, Taiwan, known for her groundbreaking contributions to the field of technology and innovation.

Latest Patents:

Zi-Wei Fang holds several patents in the areas of semiconductor technology, nanotechnology, and renewable energy solutions, showcasing her versatility and forward-thinking approach to invention.

Career Highlights:

With a career spanning over two decades, Zi-Wei Fang has worked tirelessly to push the boundaries of technological advancement. Her innovative spirit has led to the development of cutting-edge solutions that have revolutionized various industries.

Collaborations:

Throughout her career, Zi-Wei Fang has collaborated with leading research institutions, universities, and tech companies to further her inventions and bring them to market. Her ability to work across disciplines has resulted in the creation of impactful and transformative technologies.

Conclusion:

In conclusion, Zi-Wei Fang's dedication to innovation and her relentless pursuit of technological advancement have solidified her reputation as a trailblazing inventor in Hsinchu County, Taiwan, and beyond. Her work continues to inspire future generations of inventors to push the boundaries of what is possible in the world of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…