Hiratsuka, Japan

Yasunori Narizuka

This inventor holds 25 USPTO granted patents and 5 published patent applications, primarily in Semiconductor Manufacturing. Top assignees: Renesas Technology Corp., Hitachi, Ltd., Renesas Electronics Corporation. Active years: 1989-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasunori Narizuka. Retrieved from https://idiyas.com/inventor/yasunori-narizuka

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 25 

% Patents Active = 48.0

Average Co-Inventor Count = 4.6

ph-index = 7

Forward Citations = 274(Granted Patents)


Location History:

  • Hiratsuka, JP (1993 - 2011)
  • Tokyo, JP (2008 - 2012)
  • Yokohama, JP (1989 - 2013)

Company Filing History:


Years Active: 1989-2013

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Areas of Expertise:
Semiconductor Integrated Circuit
Probe Card
Thin Film Probe Sheet
Fabrication Method
Low-EMI Circuit Board
Wiring Board
Thermal Printing Head
Sputtering Target
Probe Cassette
Semiconductor Inspection Apparatus
Thin Film Resistor
Multilayer Wiring Board
25 patents (USPTO):Explore Patents

Title: Yasunori Narizuka: Innovator in Semiconductor Technology

Introduction

Yasunori Narizuka, a prominent inventor based in Hiratsuka, Japan, has made significant contributions to the semiconductor industry with a remarkable portfolio of 25 patents. His work focuses on innovative methods for manufacturing semiconductor integrated circuit devices, which play a crucial role in modern electronic applications.

Latest Patents

Among Yasunori Narizuka's latest inventions is a cutting-edge manufacturing method for semiconductor integrated circuit devices. This patent describes a process where a probe is contacted to a test pad without causing damage to the circuit formed within the chip during testing. This innovation involves the integration of a load jig, pressing tool, elastomer, adhesion ring, and plunger, all secured together using a nut and bolt. The design includes an elastic spring that enhances operation by effectively transmitting force from the plunger to a thin film sheet during testing, thus preserving the integrity of the device.

Another notable patent details a method for manufacturing both the semiconductor integrated circuit device and a thin film probe sheet. This process begins with the selective deposition of a copper film on the wafer's main surface, covering areas that will form a metal film as well as those outside the adhesion ring. The method includes several layers, ranging from metal film to polyimide films and interconnects, leading to the successful removal of the wafer and copper film. The advancements made here significantly reduce the risk of breakage during probe testing and ensure reliability in semiconductor applications.

Career Highlights

Yasunori Narizuka has had a distinguished career, having worked with esteemed companies such as Renesas Technology Corporation and Hitachi, Ltd. His experiences in these leading organizations have shaped his skills and led to numerous innovations in semiconductor technology.

Collaborations

Throughout his career, Narizuka has collaborated with notable coworkers, including Akio Hasebe and Yasuhiro Motoyama. These partnerships have contributed to the successful development and refinement of his patented technologies.

Conclusion

Yasunori Narizuka exemplifies the spirit of innovation in the semiconductor field. With his extensive patent portfolio and collaborative efforts, he continues to pave the way for advancements that enhance the performance and reliability of semiconductor devices in various applications. His commitment to improving testing methods not only benefits the manufacturers but also drives the industry towards greater efficiency and innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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