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For the Inventor, By the Inventor

Tucheng, Taiwan

Shu-Hui Su

USPTO Granted Patents = 12

Average Co-Inventor Count = 4.0

ph-index = 4

Forward Citations = 225(Granted Patents)


Company Filing History:

goldMedal12 out of 40,635 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2013-2025

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12 patents (USPTO):
1. 12317517 - Semiconductor die package and methods of formation (2025-05-27),
2. 12230542 - Method for dicing a semiconductor wafer structure (2025-02-18),
3. 12199139 - Trench capacitor film scheme to reduce substrate warpage (2025-01-14),
4. 12176387 - Trench capacitor profile to decrease substrate warpage (2024-12-24),
5. 11769792 - Trench capacitor profile to decrease substrate warpage (2023-09-26),
6. 11063157 - Trench capacitor profile to decrease substrate warpage (2021-07-13),
7. 10361152 - Semiconductor structure having an air-gap region and a method of manufacturing the same (2019-07-23),
8. 8999839 - Semiconductor structure having an air-gap region and a method of manufacturing the same (2015-04-07),
9. 8975749 - Method of making a semiconductor device including barrier layers for copper interconnect (2015-03-10),
10. 8716871 - Big via structure (2014-05-06),
11. 8653664 - Barrier layers for copper interconnect (2014-02-18),
12. 8456009 - Semiconductor structure having an air-gap region and a method of manufacturing the same (2013-06-04),

Title: Innovations of Shu-Hui Su in Semiconductor Technology

Introduction

Shu-Hui Su is a prominent inventor based in Tucheng, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 12 patents. His work focuses on enhancing the performance and reliability of semiconductor devices.

Latest Patents

One of his latest patents is titled "Semiconductor die package and methods of formation." This invention involves a semiconductor die that includes multiple decoupling trench capacitor regions. These regions are designed to provide sufficient capacitance to meet circuit decoupling parameters while minimizing the risk of warping, breaking, or cracking of the semiconductor die package. Another notable patent is the "Method for dicing a semiconductor wafer structure." This method outlines a process for forming an integrated chip by performing multiple dicing cuts along a semiconductor substrate, ensuring precision and efficiency in chip production.

Career Highlights

Shu-Hui Su is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His innovative approaches have contributed to advancements in semiconductor packaging and processing techniques.

Collaborations

Throughout his career, Shu-Hui Su has collaborated with talented individuals such as Cheng-Lin Huang and Zhen-Cheng Wu. These partnerships have fostered a creative environment that encourages the development of cutting-edge technologies.

Conclusion

Shu-Hui Su's contributions to semiconductor technology through his patents and collaborations highlight his role as a key innovator in the field. His work continues to influence the future of semiconductor design and manufacturing.

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