Waterford, NY, United States of America

Seungchan Yun

This inventor holds 21 USPTO granted patents and 24 published patent applications, primarily in Integrated Circuit Devices. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2023-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Seungchan Yun. Retrieved from https://idiyas.com/inventor/seungchan-yun-ar3tsqvw

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 21 

% Patents Active = 52.4

Average Co-Inventor Count = 3.8

ph-index = 1

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2023-2026

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Areas of Expertise:
3D-Stacked Structures
Back Side Power Distribution Network
Nanosheet Technology
Field-Effect Transistor
Integrated Circuit Devices
Semiconductor Device
Transistor Structure
Fabrication Methods
Common Gate Electrode
Isolation Structure
Resistor Structures
Diode Structures
21 patents (USPTO):Explore Patents

Title: Seungchan Yun: Innovator in Transistor Technology

Introduction

Seungchan Yun is a prominent inventor based in Waterford, NY (US). He has made significant contributions to the field of transistor technology, holding a total of 21 patents. His work focuses on innovative methods and devices that enhance the performance and efficiency of transistors.

Latest Patents

Among his latest patents is a groundbreaking design for stacked transistors that feature an isolation region between them and a common gate electrode. This invention provides a transistor device that includes a substrate, a lower transistor with a lower gate and channel region, and an upper transistor with an upper gate and channel region. The design ensures that the lower transistor is positioned between the upper transistor and the substrate, with an isolation region that separates the two channel regions. Additionally, the lower gate of the lower transistor is in contact with the upper gate of the upper transistor.

Another notable patent is for a step-stacked nanowire CMOS structure aimed at low power logic devices. This CMOS device comprises a substrate with a shallow trench isolation region, an nFET positioned above the isolation region, and a pFET. The nFET features a source region, a drain region, and a channel region that includes a series of nanowires extending from the source to the drain. The pFET also includes a source region, a drain region, and a gate region on its channel region.

Career Highlights

Seungchan Yun has established himself as a key figure in the semiconductor industry through his innovative work at Samsung Electronics Co., Ltd. His expertise in transistor technology has led to advancements that are crucial for modern electronic devices.

Collaborations

Throughout his career, Seungchan has collaborated with notable colleagues, including Byounghak Hong and Kang-Ill Seo. These partnerships have fostered a creative environment that encourages the development of cutting-edge technologies.

Conclusion

Seungchan Yun's contributions to transistor technology exemplify his commitment to innovation and excellence in the field. His patents not only reflect his technical expertise but also pave the way for future advancements in electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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