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For the Inventor, By the Inventor

Livermore, CA, United States of America

Robert Daniel Clark

This inventor holds 97 USPTO granted patents and 24 published patent applications and 3 EPO patents, primarily in Semiconductor Processing (CPC class H01L21-0228). Top assignees: Tokyo Electron Limited, Air Products and Chemicals, Inc., International Business Machines Corporation. Active years: 2005-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robert Daniel Clark. Retrieved from https://idiyas.com/inventor/robert-daniel-clark

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 97 

% Patents Active = 82.5


Average Co-Inventor Count = 1.6

ph-index = 12

Forward Citations = 1,466(Granted Patents)

Forward Citations (Not Self Cited) = 1,372(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Carlsbad, CA (US) (2006)
  • Guilderland, NY (US) (2010)
  • Schenectady, NY (US) (2009 - 2012)
  • San Marcos, CA (US) (2005 - 2013)
  • Schnectady, NY (US) (2014)
  • Livermore, NY (US) (2020 - 2021)
  • Livermore, CA (US) (2011 - 2024)
  • Albany, NY (US) (2020 - 2024)
  • Fremont, CA (US) (2020 - 2024)
  • New Castle, DE (US) (2024)

Company Filing History:

goldMedal89 out of 10,904 
 
Tokyo Electron Limited
 patents
silverMedal4 out of 3,219 
 
Air Products and Chemicals, Inc.
 patents
bronzeMedal1 out of 166,351 
 
International Business Machines Corporation
 patents
4. 1 out of 103 
 
Tokyo Electron Limi Ted
 patents
5. 1 out of 13 
 
Toyko Electron Limited
 patents
where one patent can have more than one assignee

Years Active: 2005-2026

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Areas of Expertise:
Dielectric Materials
Selective Deposition
Interconnect Structures
3D Logic Fabrication
EUV Lithography
Self-Assembled Monolayer
High-K Etch Stop Layer
Low-Resistivity Metal
Chiplet Alignment
Atomic Layer Etching
Ferroelectric FETs
Crystalline Dielectric Systems
97 patents (USPTO):Explore Patents
1. 12757701 - Catalyst-enhanced chemical vapor deposition (2026-10-06),
2. 12642084 - Method of forming a semiconductor device with air gaps for low capacitance interconnects (2026-05-26),
3. 12588435 - Selective inhibition for selective metal deposition (2026-03-24),
4. 12588434 - Methods for forming dielectric materials with selected polarization for semiconductor devices (2026-03-24),
5. 12550696 - Patterning with self-assembled monolayer (2026-02-10),
6. 12532719 - Barrier schemes for metallization using manganese and graphene (2026-01-20),
7. 12500191 - Phase change interconnects and methods for forming the same (2025-12-16),
8. 12469696 - Method of forming 3-dimensional spacer (2025-11-11),
9. 12421604 - Ultra-shallow dopant and ohmic contact regions by solid state diffusion (2025-09-23),
10. 12406887 - Selective film formation using a self-assembled monolayer (2025-09-02),
11. 12372871 - EUV active films for EUV lithography (2025-07-29),
12. 12362304 - Bonding layer and process of making (2025-07-15),
13. 12272601 - Epitaxial high-K etch stop layer for backside reveal integration (2025-04-08),
14. 12261209 - Replacement channel 2D material integration (2025-03-25),
15. 12237216 - Method for filling recessed features in semiconductor devices with a low-resistivity metal (2025-02-25),

Title: Robert Daniel Clark: Innovator in Semiconductor Technologies

Introduction: Robert Daniel Clark, based in Livermore, California, is a prominent inventor known for his groundbreaking contributions to the field of semiconductor manufacturing. With an impressive portfolio of 77 patents, Clark has made significant advancements that have influenced contemporary manufacturing processes and semiconductor device designs.

Latest Patents: Among his latest inventions, Clark holds a patent for a "Semiconductor manufacturing platform with in-situ electrical bias and methods thereof." This innovative method involves fabricating a semiconductor device by strategically placing a semiconductor wafer into deposition chambers, depositing layers, and applying electrical bias during the annealing process. Another notable patent is for a "Semiconductor device having channel structure with 2D material," which outlines the fabrication of a semiconductor device with a channel structure that incorporates two-dimensional materials, enhancing the performance of vertical transistors.

Career Highlights: Throughout his career, Robert Daniel Clark has worked with leading companies in the semiconductor industry, including Tokyo Electron Limited and Air Products and Chemicals, Inc. His experience in these high-profile organizations has equipped him with a profound understanding of semiconductor technologies and manufacturing processes.

Collaborations: Clark's innovative journey has been enhanced by collaborations with talented professionals such as Kandabara N. Tapily and Kai-Hung Yu. Together, they have contributed to the development of cutting-edge technologies that address the evolving needs of the semiconductor industry.

Conclusion: Robert Daniel Clark stands out as a key figure in semiconductor innovation. His extensive patent portfolio and strategic collaborations underscore his commitment to advancing technology in the field. As semiconductor devices continue to evolve, Clark's contributions will undoubtedly inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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