Singapore, Singapore

Kin Leong Pey

This inventor holds 34 USPTO granted patents and 1 published patent application and 1 EPO patent, primarily in Semiconductor Fabrication. Top assignees: Chartered Semiconductor Manufacturing Ltd (Corporation), Globalfoundries Singapore Pte. Ltd., National University of Singapore. Active years: 1993-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kin Leong Pey. Retrieved from https://idiyas.com/inventor/kin-leong-pey

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 34 

% Patents Active = 70.6

 

Average Co-Inventor Count = 4.1

ph-index = 12

Forward Citations = 431(Granted Patents)


Company Filing History:


Years Active: 1993-2019

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Areas of Expertise:
Dual Metal Gates
Shallow Junctions
Nickel Salicidation
Epitaxial Growth
Silicide Formation
MOS Transistors
Laser Annealing
CMOS Technology
Dielectric Layers
Thermal Analysis
Sub-Micron Devices
Conductive Oxides
34 patents (USPTO):Explore Patents

Title: **The Innovative Journey of Kin Leong Pey**

Introduction

Kin Leong Pey, a prominent inventor based in Singapore, has made significant contributions to the field of semiconductor manufacturing. With an impressive portfolio of 34 patents, his work exemplifies innovation and technical expertise in advancing technologies essential for modern electronics.

Latest Patents

Among Kin Leong Pey's recent patents are two noteworthy innovations. The first patent, titled "Control gate dummy for word line uniformity and method for producing the same," presents a method for forming a uniform word line over a Multi-Channel Elector-Transistor (MCEL) region. This involves the careful arrangement of substrate regions, including the HV region and the logic region, to ensure device effectiveness and performance.

His second patent, "Slot designs in wide metal lines," introduces an innovative interconnect structure. This design incorporates stress-relieving slots in wide lines to enhance device reliability. The configurations within the dual damascene interconnect allow for effective stress management while maintaining strong electrical connections.

Career Highlights

Kin Leong Pey has an extensive career in the semiconductor industry, having worked for notable companies such as Chartered Semiconductor Manufacturing Ltd and Globalfoundries Singapore Pte. Ltd. His experience has equipped him with the skills necessary to drive advancements in technology, particularly concerning fabrication processes in integrated circuits.

Collaborations

Throughout his career, Kin has collaborated with esteemed colleagues, including Simon Yew-Meng Chooi and Wenhe Lin. These partnerships have fostered an environment of innovation and have contributed to successful projects that highlight their collective expertise and creativity.

Conclusion

Kin Leong Pey stands out as a leading inventor in the semiconductor field, with a record of inventive contributions that push the boundaries of technology. His dedication to innovation and collaboration with fellow experts ensures his continued impact on the industry, paving the way for future advancements in semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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