The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2019
Filed:
Mar. 22, 2018
Globalfoundries Singapore Pte. Ltd., Singapore, SG;
Laiqiang Luo, Singapore, SG;
Sen Mei, Singapore, SG;
Fangxin Deng, Singapore, SG;
Zhiqiang Teo, Singapore, SG;
Fan Zhang, Singapore, SG;
Pinghui Li, Singapore, SG;
Haiqing Zhou, Singapore, SG;
Xingyu Chen, Singapore, SG;
Kin Leong Pey, Singapore, SG;
GLOBALFOUNDRIES SINGAPORE PTE. LTD., Singapore, SG;
Abstract
A method of forming a uniform WL over the MCEL region and resulting device are provided. Embodiments include providing a substrate having a MCEL region, a HV region and a logic region, separated by an isolation region; forming a plurality of CG stacks over the MCEL region, and a plurality of CG dummy stacks over the HV region and the logic region, respectively; forming first and second overlying polysilicon layers with a spacer therebetween, an EG and a WL on the MCEL region formed; planarizing the second polysilicon layer down to upper surface of the plurality of CG stacks and the plurality of CG dummy stacks; and removing portions of the second polysilicon layer in-between the plurality of CG stacks and around the plurality of CG dummy stacks.