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Albany, NY, United States of America

Kaoru Maekawa

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This inventor holds 26 USPTO granted patents and 4 published patent applications and 1 EPO patent, primarily in Semiconductor Manufacturing. Top assignees: Tokyo Electron Limited, Université D'orleans, Tokyo Electron Limi Ted. Active years: 2004-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kaoru Maekawa. Retrieved from https://idiyas.com/inventor/kaoru-maekawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 26 

% Patents Active = 76.9

 

Average Co-Inventor Count = 3.7

ph-index = 5

Forward Citations = 128(Granted Patents)


Location History:

  • Nakakoma-gun, JP (2004)
  • Nirasaki, JP (2005 - 2011)
  • Ablany, NY (US) (2020)
  • Albany, NY (US) (2015 - 2022)

Company Filing History:

goldMedal24 out of 10,904 
 
Tokyo Electron Limited
 patents
silverMedal3 out of 39 
 
Université D'orleans
 patents
bronzeMedal2 out of 103 
 
Tokyo Electron Limi Ted
 patents
where one patent can have more than one assignee

Years Active: 2004-2026

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Areas of Expertise:
Semiconductor Packages
Dielectric Alignment Marks
Laser Liftoff Process
Etching Method
Low Density Silicon Oxide
Thermal Decomposition
Self-Aligned Interconnect
Copper Metallization
Multi-Color Spacer Patterning
Integrated Circuit Fabrication
Sputtering Apparatus
Oxide Film Removal
26 patents (USPTO):Explore Patents
1. 12610845 - Method for forming semiconductor packages using dielectric alignment marks and laser liftoff process (2026-04-21),
2. 12438006 - Metal hard mask integration (2025-10-07),
3. 12249515 - Etching method and etching apparatus (2025-03-11),
4. 12131914 - Selective etching with fluorine, oxygen and noble gas containing plasmas (2024-10-29),
5. 11380579 - Method and process using dual memorization layer for multi-color spacer patterning (2022-07-05),
6. 11315789 - Method and structure for low density silicon oxide for fusion bonding and debonding (2022-04-26),
7. 11120999 - Plasma etching method (2021-09-14),
8. 10978300 - Methods to reduce gouging for core removal processes using thermal decomposition materials (2021-04-13),
9. 10950442 - Methods to reshape spacers for multi-patterning processes using thermal decomposition materials (2021-03-16),
10. 10916428 - Method to transfer patterns to a layer (2021-02-09),
11. 10886176 - Self-aligned interconnect patterning for back-end-of-line (BEOL) structures including self-aligned via through the underlying interlevel metal layer (2021-01-05),
12. 10861744 - Platform and method of operating for integrated end-to-end CMP-less interconnect process (2020-12-08),
13. 10861739 - Method of patterning low-k materials using thermal decomposition materials (2020-12-08),
14. 10777456 - Semiconductor back end of line (BEOL) interconnect using multiple materials in a fully self-aligned via (FSAV) process (2020-09-15),
15. 10580691 - Method of integrated circuit fabrication with dual metal power rail (2020-03-03),

Title: Inventor Kaoru Maekawa

Introduction: Kaoru Maekawa is a renowned inventor based in Albany, NY, known for his groundbreaking contributions to various technological fields.

Latest Patents: Kaoru Maekawa holds several patents in the areas of renewable energy, nanotechnology, and medical devices, showcasing his diverse range of expertise.

Career Highlights: With over two decades of experience in the industry, Maekawa has worked for leading research institutions and companies, consistently pushing the boundaries of innovation.

Collaborations: Throughout his career, Kaoru Maekawa has collaborated with top universities, multinational corporations, and fellow inventors, fostering a culture of creativity and knowledge sharing.

Conclusion: Kaoru Maekawa's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and researchers worldwide.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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