Company Filing History:

14 out of 755

Lattice Semiconductor Corporation

patents

4 out of 90,594

Canon Kabushiki Kaisha

Years Active: 2001-2019

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20 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10262096 - Component placement with repacking for programmable logic devices (2019-04-16),

2. 10243443 - Bias voltage generator for n-channel based linear regulator (2019-03-26),

3. 9390220 - Bus-based clock to out path optimization (2016-07-12),

4. 9379611 - SIMO (single inductor multiple output) bidirectional dual-boost architecture (2016-06-28),

5. 9330217 - Holdtime correction using input/output block delay (2016-05-03),

6. 8856718 - Congestion estimation based on routing resources of programmable logic devices (2014-10-07),

7. 8181139 - Multi-priority placement for configuring programmable logic devices (2012-05-15),

8. 7757198 - Scan chain systems and methods for programmable logic devices (2010-07-13),

9. 7696784 - Programmable logic device with multiple slice types (2010-04-13),

10. 7675321 - Dual-slice architectures for programmable logic devices (2010-03-09),

11. 7605606 - Area efficient routing architectures for programmable logic devices (2009-10-20),

12. 7592834 - Logic block control architectures for programmable logic devices (2009-09-22),

13. 7557606 - Synchronization of data signals and clock signals for programmable logic devices (2009-07-07),

14. 7397276 - Logic block control architectures for programmable logic devices (2008-07-08),

15. 7385417 - Dual slice architectures for programmable logic devices (2008-06-10),

Title: Innovations and Contributions of Jun Zhao in the Field of Technology

Introduction

Jun Zhao is an accomplished inventor based in Allentown, PA, with a notable track record of 20 patents in the field of programmable logic devices and power supply technologies. His innovations have significantly impacted how components are placed and managed in complex electronic systems.

Latest Patents

Among Jun Zhao’s latest inventions are two prominent patents. The first is focused on "Component placement with repacking for programmable logic devices," where advanced systems and methods improve the placement of components in programmable logic devices (PLDs). This patent outlines a computer-implemented method that involves receiving a design, determining a layout of the PLD components, performing timing analysis, and adjusting component positions based on the analysis. The second patent, titled "Bias voltage generator for n-channel based linear regulator," details a bias supply circuit supporting power supply systems. It describes a cascaded system that includes a switched-mode DC-to-DC power converter and an n-channel field-effect transistor (NFET) linear regulator, designed to optimize power delivery in various applications.

Career Highlights

Jun Zhao has made significant contributions to the technology sector, particularly through his work at Lattice Semiconductor Corporation and Canon Kabushiki Kaisha. His professional journey showcases his dedication to innovation and engineering excellence, driving advancements in electronic components and systems.

Collaborations

Throughout his career, Jun Zhao has collaborated with distinguished colleagues such as Om P Agrawal and Xiaojie He. These partnerships have played a crucial role in fostering innovation and enhancing the quality of technological solutions developed in their projects.

Conclusion

With 20 patents to his name, Jun Zhao has established himself as a leading figure in his field. His latest innovations in programmable logic devices and power supply technologies highlight his commitment to improving electronic design and functionality. As he continues to push the boundaries of technology, Jun Zhao remains an inspiration for current and future inventors in the industry.

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