The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2012
Filed:
Dec. 22, 2008
Xiaotao Chen, Macungie, PA (US);
Eric Ting, Lower Macungie, PA (US);
Ruofan Xu, Allentown, PA (US);
Yanhua Yi, Allentown, PA (US);
Jun Zhao, Allentown, PA (US);
Xiaotao Chen, Macungie, PA (US);
Eric Ting, Lower Macungie, PA (US);
Ruofan Xu, Allentown, PA (US);
Yanhua Yi, Allentown, PA (US);
Jun Zhao, Allentown, PA (US);
Lattice Semicondutor Corporation, Hillsboro, OR (US);
Abstract
In one embodiment of the invention, a computer-implemented method of configuring a programmable logic device (PLD) includes placing logical functions within logical resources of the PLD to implement a desired netlist; swapping the logical function of at least one logical resource with the logical function of at least one other logical resource within the PLD; and evaluating whether to accept or reject the swap using a simulated annealing process that calculates at least three cost function values based upon routing priority groups, timing priority groups, and a timing critical group.