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For the Inventor, By the Inventor

Santa Clara, CA, United States of America

Jason Kirkwood

This inventor holds 12 USPTO granted patents and 1 published patent application and 1 EPO patent. Top assignees: Kla Tencor Corporation, Kla Corporation. Active years: 2011-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jason Kirkwood. Retrieved from https://idiyas.com/inventor/jason-kirkwood

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 12 

% Patents Active = 100.0

 

Average Co-Inventor Count = 3.7

ph-index = 3

Forward Citations = 36(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2011 - 2020)
  • Mountain View, CA (US) (2015 - 2023)

Company Filing History:

goldMedal8 out of 1,787 
 
Kla Tencor Corporation
 patents
silverMedal4 out of 619 
 
Kla Corporation
 patents

Years Active: 2011-2025

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12 patents (USPTO):Explore Patents
1. 12444174 - Rare event training data sets for robust training of semiconductor yield related components (2025-10-14),
2. 12100132 - Laser anneal pattern suppression (2024-09-24),
3. 11774371 - Defect size measurement using deep learning methods (2023-10-03),
4. 10854486 - System and method for characterization of buried defects (2020-12-01),
5. 10605744 - Systems and methods for detecting defects on a wafer (2020-03-31),
6. 10067072 - Methods and apparatus for speckle suppression in laser dark-field systems (2018-09-04),
7. 9880107 - Systems and methods for detecting defects on a wafer (2018-01-30),
8. 9360863 - Data perturbation for wafer inspection or metrology setup using a model of a difference (2016-06-07),
9. 9053390 - Automated inspection scenario generation (2015-06-09),
10. 8467047 - Systems and methods for detecting defects on a wafer (2013-06-18),
11. 8223327 - Systems and methods for detecting defects on a wafer (2012-07-17),
12. 8049877 - Computer-implemented methods, carrier media, and systems for selecting polarization settings for an inspection system (2011-11-01),

Title: Jason Kirkwood: Innovator in Semiconductor Technology

Introduction

Jason Kirkwood is a prominent inventor based in Santa Clara, CA. He has made significant contributions to the field of semiconductor technology, holding a total of 12 patents. His work focuses on improving the robustness and efficiency of semiconductor yield-related components.

Latest Patents

Among his latest patents is a method for creating rare event training data sets for robust training of semiconductor yield-related components. This innovative method involves collecting images of known rare defect types and assigning training labels to these images. The collected images are stored as a rare defect type training data set, which is essential for training components that determine information from runtime images generated by imaging systems. Another notable patent addresses laser anneal pattern suppression, where the location of grid lines in an image of a laser-annealed semiconductor wafer is determined. This method enhances image quality by filling areas covered by grid lines with new gray values based on surrounding neighborhoods.

Career Highlights

Jason has worked with notable companies in the semiconductor industry, including KLA-Tencor Corporation and KLA Corporation. His experience in these organizations has allowed him to develop and refine his innovative techniques in semiconductor technology.

Collaborations

Throughout his career, Jason has collaborated with talented individuals such as Mohan Mahadevan and Lisheng Gao. These collaborations have contributed to the advancement of his research and the successful development of his patents.

Conclusion

Jason Kirkwood is a key figure in the semiconductor industry, with a strong portfolio of patents that reflect his innovative spirit and technical expertise. His contributions continue to shape the future of semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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