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For the Inventor, By the Inventor

Hsinchu, Taiwan

Huai-Tei Yang

This inventor holds 79 USPTO granted patents and 13 published patent applications, primarily in Semiconductor Fabrication (CPC class H01L). Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Parabellum Strategic Oppurtunities Fund LLC. Active years: 2002-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Huai-Tei Yang. Retrieved from https://idiyas.com/inventor/huai-tei-yang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 79 

% Patents Active = 93.7

Average Co-Inventor Count = 4.8

ph-index = 7

Forward Citations = 122(Granted Patents)

Forward Citations (Not Self Cited) = 96(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal78 out of 42,926 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal1 out of 1 
 
Parabellum Strategic Oppurtunities Fund LLC
 patent

Years Active: 2002-2026

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Areas of Expertise:
FinFET Devices
Epitaxial Stacks
Doping Techniques
Silicon Intermixing Layer
Chemical Mechanical Polishing
High-k Metal Gate
Etching Apparatus
Vacuum Systems
P-type Strained Channel
Source/Drain Multi-layer Structure
In-situ Etching Processes
Gate Structure
79 patents (USPTO):Explore Patents
1. 12757422 - Method for manufacturing semiconductor structure with source/drain structure having modified shape (2026-10-06),
2. 12527041 - Method of forming source/drain epitaxial stacks (2026-01-13),
3. 12490508 - Semiconductor device and method (2025-12-02),
4. 12446255 - Semiconductor structure with source/drain multi-layer structure and method for forming the same (2025-10-14),
5. 12394624 - Silicon intermixing layer for blocking diffusion (2025-08-19),
6. 12371780 - Vacuum systems in semiconductor fabrication facilities (2025-07-29),
7. 12170202 - Formation and in-situ etching processes for metal layers (2024-12-17),
8. 12080761 - Fully strained channel (2024-09-03),
9. 12080582 - Etching apparatus and methods of cleaning thereof (2024-09-03),
10. 12021143 - P-type strained channel in a fin field effect transistor (FinFET) device (2024-06-25),
11. 12021142 - Method of forming source/drain epitaxial stacks (2024-06-25),
12. 12015055 - Doping for semiconductor device with conductive feature (2024-06-18),
13. 11990550 - Semiconductor structure with source/drain multi-layer structure and method for forming the same (2024-05-21),
14. 11973127 - Semiconductor structure with source/drain structure having modified shape (2024-04-30),
15. 11854811 - FinFET device and method of forming (2023-12-26),

Title: The Innovative Journey of Huai-Tei Yang

Introduction:

Huai-Tei Yang, a distinguished inventor hailing from Hsinchu, Taiwan, has made significant contributions to the field of technology and innovation through his groundbreaking inventions.

Latest Patents:

Huai-Tei Yang's latest patents focus on advancements in semiconductor technology, particularly in the development of cutting-edge microchips with enhanced performance and efficiency.

Career Highlights:

With a career spanning over two decades, Huai-Tei Yang has held key roles in leading tech companies, where he spearheaded research and development projects that have resulted in numerous patented inventions. His expertise in semiconductor design and manufacturing has been instrumental in shaping the industry.

Collaborations:

Throughout his career, Huai-Tei Yang has collaborated with top researchers, engineers, and industry experts to push the boundaries of technological innovation. His collaborative efforts have led to the successful development of groundbreaking products that have revolutionized the tech landscape.

Conclusion:

In conclusion, Huai-Tei Yang's relentless pursuit of innovation and his passion for pushing the limits of technology have solidified his reputation as a visionary inventor in the field of semiconductor technology. His contributions continue to inspire future generations of inventors and shape the future of technological advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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