Ibaraki, Japan

Hirokazu Matsumoto

This inventor holds 39 USPTO granted patents and 1 published patent application, plus 1 CIPO patent and 3 EPO patents, primarily in Semiconductor Technology. Top assignees: Takeda Pharmaceutical Company Limited, Disco Corporation, Micron Technology Incorporated. Active years: 1993-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hirokazu Matsumoto. Retrieved from https://idiyas.com/inventor/hirokazu-matsumoto

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 39 

% Patents Active = 66.7

 

 

Average Co-Inventor Count = 3.3

ph-index = 5

Forward Citations = 64(Granted Patents)


Location History:

  • Yokohama, JP (2011)
  • Ota-ku, JP (2010 - 2012)
  • Ibaraki, JP (1993 - 2013)
  • Tsukuba, JP (1995 - 2015)
  • Kanagawa, JP (2015)
  • Asaka, JP (2021)
  • Tokyo, JP (2010 - 2023)
  • Hachioji, JP (2023 - 2024)

Company Filing History:


Years Active: 1993-2025

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Areas of Expertise:
Semiconductor Device
Memory Cell Mats
Voltage Lines
Conductive Structures
Wafer Processing
Laser Processing
Layout Effects
Trench Walls
Insulating Film
Distance Measuring
Antibodies
Peptide Use
39 patents (USPTO):Explore Patents

Title: The Innovative Journey of Hirokazu Matsumoto

Introduction

Hirokazu Matsumoto, an esteemed inventor based in Ibaraki, Japan, has made significant contributions to the field of semiconductor technology. With an impressive portfolio comprising 38 patents, Matsumoto has shaped advancements that are vital to modern electronics and computing.

Latest Patents

Matsumoto's most recent patents reflect his dedication to enhancing semiconductor performance and efficiency. One of his notable inventions, titled "Apparatuses Including Semiconductor Layout to Mitigate Local Layout Effects," describes an innovative structure composed of multiple standard cells. Each cell integrates an active region and an isolation region, featuring unique gate structures that improve device layout. This advancement aims to optimize the relationships between contact points and gate portions, ultimately enhancing the overall reliability of semiconductor devices.

Another groundbreaking invention, "Semiconductor Device Having STI Regions," presents a novel semiconductor substrate design. This apparatus includes strategically arranged silicon technology integrated regions (STI) and a combination of diffusion regions that contribute to the formation of both P-channel and N-channel MOS transistors. This invention is crucial for the development of high-performance silicon-based devices.

Career Highlights

Matsumoto's career includes valuable experiences at esteemed organizations. He has contributed his expertise to Takeda Pharmaceutical Company Limited, where he played a key role in projects that bridged pharmaceuticals and technology. Additionally, his tenure at Disco Corporation further positions him as a leader in semiconductor innovation, where he applied his skills to enhance manufacturing processes and device reliability.

Collaborations

Throughout his career, Matsumoto has collaborated with notable professionals in the industry. His partnerships with peers, such as Chieko Kitada and Tetsuya Ohtaki, have fostered innovative solutions and advanced research projects that continue to push the boundaries of semiconductor technology.

Conclusion

Hirokazu Matsumoto's patents and career achievements highlight his vital role as an inventor in the semiconductor industry. His ability to address complex challenges with innovative solutions underscores the importance of collaboration and continuous advancement in technology. With his significant contributions, Matsumoto is poised to continue influencing the future landscape of electronics and semiconductor design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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