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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9543191 B1

PDFFull Text
Date of Patent:
Jan. 10, 2017

Filed:

Feb. 21, 2013

Wiring structure having interlayer insulating film and wiring line without a barrier layer between

Applicants:

Tokyo Electron Limited, Tokyo, JP;

Zeon Corporation, Tokyo, JP;

Tohoku University, Miyagi, JP;

Inventors:

Takenao Nemoto, Miyagi, JP;

Takehisa Saito, Miyagi, JP;

Yugo Tomita, Miyagi, JP;

Hirokazu Matsumoto, Tokyo, JP;

Akihide Shirotori, Tokyo, JP;

Akinobu Teramoto, Miyagi, JP;

Xun Gu, Miyagi, JP;

Assignees:

ZEON CORPORATION, Tokyo, JP;

TOHOKU UNIVERSITY, Miyagi, JP;

Attorney:

Rothwell, Figg, Ernst & Manbeck, P.C.

Primary Examiner:

Dzung Tran

Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/00 (2006.01); H01L 21/44 (2006.01); H01L 21/31 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 21/02 (2006.01); H01J 37/32 (2006.01); H01L 21/3105 (2006.01); H01L 21/3205 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/768 (2013.01); H01J 37/32192 (2013.01); H01L 21/0212 (2013.01); H01L 21/02063 (2013.01); H01L 21/02274 (2013.01); H01L 21/31058 (2013.01); H01L 21/3205 (2013.01); H01L 21/76801 (2013.01); H01L 21/76814 (2013.01); H01L 21/76826 (2013.01); H01L 21/76828 (2013.01); H01L 21/76831 (2013.01); H01L 23/53204 (2013.01); H01L 23/53238 (2013.01); H01L 23/53295 (2013.01); H01L 21/02126 (2013.01); H01L 21/02167 (2013.01); H01L 21/31138 (2013.01); H01L 21/31144 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Provided are a semiconductor device and semiconductor-device manufacturing method that make it possible to improve the contact between an insulating film and a wiring member and the reliability thereof. This method for manufacturing a semiconductor device () includes a step in which a CF film () is formed on top of a semiconductor substrate (), a step in which grooves (C) corresponding to a wiring pattern (P) are formed in the CF film (), and a step in which a copper wiring member () is embedded in the grooves (C).

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