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For the Inventor, By the Inventor

San Jose, CA, United States of America

Giap H Tran

This inventor holds 30 USPTO granted patents, primarily in FPGA Architecture. Top assignees: Vantis Corporation, Lattice Semiconductor Corporation, Advanced Micro Devices Corporation. Active years: 1995-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Giap H Tran. Retrieved from https://idiyas.com/inventor/giap-h-tran

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 30

% Patents Active = 100.0

Average Co-Inventor Count = 3.7

ph-index = 13

Forward Citations = 742(Granted Patents)


Company Filing History:

goldMedal16 out of 67 
 
Vantis Corporation
 patents
silverMedal13 out of 765 
 
Lattice Semiconductor Corporation
 patents
bronzeMedal1 out of 13,192 
 
Advanced Micro Devices Corporation
 patents

Years Active: 1995-2016

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Areas of Expertise:
FPGA
Programmable Logic
I/O Buffer
Variable Grain
Serializer-Deserializer
Power-Saving Architecture
Output Buffers
Control Signals
Time-Shared Access
Interconnect Resources
Configuration Logic
Amplifiers
30 patents (USPTO):Explore Patents
1. 9515643 - Hot-socket circuitry (2016-12-06),
2. 9287872 - PVT compensation scheme for output buffers (2016-03-15),
3. 7787326 - Programmable logic device with a multi-data rate SDRAM interface (2010-08-31),
4. 7558143 - Programmable logic device with power-saving architecture (2009-07-07),
5. 7411419 - Input/output systems and methods (2008-08-12),
6. 7376037 - Programmable logic device with power-saving architecture (2008-05-20),
7. 7342838 - Programmable logic device with a double data rate SDRAM interface (2008-03-11),
8. 7098685 - Scalable serializer-deserializer architecture and programmable interface (2006-08-29),
9. 7061269 - I/O buffer architecture for programmable devices (2006-06-13),
10. 6621298 - Variable grain architecture for FPGA integrated circuits (2003-09-16),
11. 6590415 - Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources (2003-07-08),
12. 6526558 - Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources (2003-02-25),
13. 6380759 - Variable grain architecture for FPGA integrated circuits (2002-04-30),
14. 6292930 - Methods for configuring FPGA's having variable grain blocks and shared logic for providing time-shared access to interconnect resources (2001-09-18),
15. 6275064 - Symmetrical, extended and fast direct connections between variable grain blocks in FPGA integrated circuits (2001-08-14),

Title: Inventor Giap H Tran - Revolutionizing Technology in San Jose

Introduction: Giap H Tran is a visionary inventor based in San Jose, CA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Giap H Tran holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his commitment to pushing the boundaries of technological advancement.

Career Highlights: With a career spanning over two decades, Giap H Tran has worked with leading tech companies in Silicon Valley, spearheading projects that have revolutionized industries and paved the way for future innovations.

Collaborations: Throughout his career, Giap H Tran has collaborated with top researchers, engineers, and scientists, fostering a culture of innovation and creativity that has led to numerous breakthroughs in the tech sector.

Conclusion: Inventor Giap H Tran's relentless pursuit of innovation and his passion for pushing the limits of technology make him a true pioneer in the field, with a lasting impact on the world of inventions and patents.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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