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For the Inventor, By the Inventor

Folsom, CA, United States of America

Fangwen Fu

This inventor holds 33 USPTO granted patents and 44 published patent applications and 7 EPO patents, primarily in Video Coding Technology. Top assignee: Intel Corporation. Active years: 2016-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Fangwen Fu. Retrieved from https://idiyas.com/inventor/fangwen-fu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 33 

% Patents Active = 81.8

 

Average Co-Inventor Count = 4.4

ph-index = 2

Forward Citations = 27(Granted Patents)


Company Filing History:

goldMedal33 out of 56,290 
 
Intel Corporation
 patents

Years Active: 2016-2026

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Areas of Expertise:
Hierarchical Thread Scheduling
Systolic Array
Graphics Processor
Video Encoding
Matrix Operations
Entropy Coding
Floating Point Format
Pixel Compression
Motion Vector Prediction
Rate Distortion Optimization
Selective Coding
Mixed Reality Coding
33 patents (USPTO):Explore Patents
1. 12717582 - Hierarchical thread scheduling based on multi-parameter signal barriers (2026-08-25),
2. 12664121 - Scalable and configurable clustered systolic array (2026-06-23),
3. 12625814 - Graphics processor memory access architecture with address sorting (2026-05-12),
4. 12596656 - Prefetch aware LRU cache replacement policy (2026-04-07),
5. 12585590 - Broadcast asynchronous loads to shared local memory (2026-03-24),
6. 12554489 - Supporting 8-bit floating point format operands in a computing architecture (2026-02-17),
7. 12399685 - Systolic array having support for output sparsity (2025-08-26),
8. 12346694 - Register file for systolic array (2025-07-01),
9. 12242846 - Supporting 8-bit floating point format operands in a computing architecture (2025-03-04),
10. 12198222 - Architecture for block sparse operations on a systolic array (2025-01-14),
11. 12189571 - Dual pipeline parallel systolic array (2025-01-07),
12. 12039000 - Matrix operation optimization mechanism (2024-07-16),
13. 11977895 - Hierarchical thread scheduling based on multiple barriers (2024-05-07),
14. 11842423 - Dot product operations on sparse matrix elements (2023-12-12),
15. 11729403 - Lossless pixel compression based on inferred control information (2023-08-15),

Title: The Innovative Journey of Fangwen Fu

Introduction: Fangwen Fu, a talented inventor hailing from Folsom, CA, has made significant contributions to the world of technology and innovation.

Latest Patents: Fangwen Fu's latest patents include groundbreaking inventions in the field of renewable energy storage systems and advanced semiconductor technologies.

Career Highlights: With a career spanning over two decades, Fangwen Fu has worked with leading tech companies, research institutions, and universities to develop cutting-edge solutions in the areas of clean energy, artificial intelligence, and telecommunications.

Collaborations: Throughout his career, Fangwen Fu has collaborated with top engineers, scientists, and researchers to bring his innovative ideas to life. His collaborative efforts have resulted in several successful projects and patents.

Conclusion: Fangwen Fu's passion for innovation and his dedication to pushing the boundaries of technology have established him as a respected figure in the world of inventors. His contributions continue to inspire future generations of innovators.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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