The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2025
Filed:
Jun. 25, 2021
Intel Corporation, Santa Clara, CA (US);
Jorge Parra, El Dorado Hills, CA (US);
Fangwen Fu, Folsom, CA (US);
Subramaniam Maiyuran, Gold River, CA (US);
Varghese George, Folsom, CA (US);
Mike Macpherson, Portland, OR (US);
Supratim Pal, Folsom, CA (US);
Chandra Gurram, Folsom, CA (US);
Sabareesh Ganapathy, Bangalore, IN;
Sasikanth Avancha, Kolar District, IN;
Dharma Teja Vooturi, Jagtial, IN;
Naveen Mellempudi, Bangalore, IN;
Dipankar Das, Pune, IN;
Intel Corporation, Santa Clara, CA (US);
Abstract
A processing apparatus is described herein that includes a general-purpose parallel processing engine comprising a matrix accelerator including one or more systolic arrays, at least one of the one or more systolic arrays comprising multiple pipeline stages, each pipeline stage of the multiple pipeline stages including multiple processing elements, the multiple processing elements configured to perform processing operations on input matrix elements based on output sparsity metadata. The output sparsity metadata indicates to the multiple processing elements to bypass multiplication for a first row of elements of a second matrix and multiply a second row of elements of the second matrix with a column of matrix elements of a first matrix.