The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Oct. 25, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

John A. Wiegert, Aloha, OR (US);

Joydeep Ray, Folsom, CA (US);

Vasanth Ranganathan, El Dorado Hills, CA (US);

Biju George, Folsom, CA (US);

Fangwen Fu, Folsom, CA (US);

Abhishek R. Appu, El Dorado Hills, CA (US);

Chunhui Mei, San Diego, CA (US);

Changwon Rhee, Rocklin, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/0855 (2016.01); G06F 12/0831 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0857 (2013.01); G06F 12/0833 (2013.01); G06F 2212/1016 (2013.01);
Abstract

Embodiments described herein provide a technique to facilitate the broadcast or multicast of asynchronous loads to shared local memory of a plurality of graphics cores within a graphics core cluster. One embodiment provides a graphics processor including a cache memory a graphics core cluster coupled with the cache memory. The graphics core cluster includes a plurality of graphics cores. The plurality of graphics cores includes a graphics core configured to receive a designation as a producer graphics core for a multicast load, read data from the cache memory; and transmit the data read from the cache memory to a consumer graphics core of the plurality of graphics cores.


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