IDiyas

For the Inventor, By the Inventor

Hsinchu, Taiwan

Dhanyakumar Mahaveer Sathaiya

USPTO Granted Patents = 13 

Average Co-Inventor Count = 4.0

ph-index = 2

Forward Citations = 9(Granted Patents)


Company Filing History:

goldMedal13 out of 40,635 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2015-2025

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13 patents (USPTO):
1. 12218205 - 2D-channel transistor structure with source-drain engineering (2025-02-04),
2. 12166079 - 2D channel transistors with low contact resistance (2024-12-10),
3. 12087819 - Dual channel structure (2024-09-10),
4. 12068374 - Method of dopant deactivation underneath gate (2024-08-20),
5. 11798985 - Methods for manufacturing isolation layers in stacked transistor structures (2023-10-24),
6. 11728391 - 2d-channel transistor structure with source-drain engineering (2023-08-15),
7. 11476333 - Dual channel structure (2022-10-18),
8. 11450666 - Semiconductor devices including two-dimensional material and methods of fabrication thereof (2022-09-20),
9. 10985246 - MOSFET with selective dopant deactivation underneath gate (2021-04-20),
10. 10157985 - MOSFET with selective dopant deactivation underneath gate (2018-12-18),
11. 9263345 - SOI transistors with improved source/drain structures with enhanced strain (2016-02-16),
12. 9153662 - MOSFET with selective dopant deactivation underneath gate (2015-10-06),
13. 8993424 - Method for forming a semiconductor transistor device with optimized dopant profile (2015-03-31),

Title: Innovator Spotlight: Dhanyakumar Mahaveer Sathaiya

Introduction

Dhanyakumar Mahaveer Sathaiya is a remarkable inventor based in Hsinchu, Taiwan, known for his significant contributions to the field of semiconductor technology. With an impressive portfolio of 13 patents, Sathaiya is recognized for his innovative advancements in transistor structures and related methods.

Latest Patents

Among his latest contributions, Sathaiya has developed a patent for a 2D-channel transistor structure with source-drain engineering. This semiconductor invention encompasses a method that includes providing a workpiece with a semiconductor structure, depositing a two-dimensional material layer, and forming a gate structure capable of creating a field-effect transistor. The configuration allows both the semiconductor structure and the 2D material layer to function as separate channels connected between the source and drain features.

Additionally, his work on 2D channel transistors with low contact resistance provides significant advancements in field-effect transistor technology. This patent outlines a method that involves depositing layers of dielectric and metal on a semiconductor substrate, forming a gate opening, and creating a channel inclusive of a TMC layer, which enhances device performance by minimizing contact resistance.

Career Highlights

Dhanyakumar Mahaveer Sathaiya is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His exceptional work and innovative mindset have greatly contributed to the company's research and development.

Collaborations

Throughout his career, Sathaiya has collaborated with distinguished professionals, including Ken-Ichi Goto and Tzer-Min Shen. These collaborations have helped foster innovation and drive advancements in semiconductor technologies.

Conclusion

Dhanyakumar Mahaveer Sathaiya stands out as an influential figure in semiconductor research and development. With his notable patents and collaborative efforts, he continues to pave the way for future innovations in the industry. His dedication and expertise in transistor technology are instrumental in advancing the capabilities of modern semiconductor devices.

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