The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2024
Filed:
Nov. 16, 2021
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Mrunal Abhijith Khaderbad, Hsinchu, TW;
Dhanyakumar Mahaveer Sathaiya, Hsinchu, TW;
Wei-Yen Woon, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
The present disclosure describes a 2D channel FET with low contact resistance and a method for forming such a structure. The method includes depositing a dielectric layer on a semiconductor substrate, depositing a metal layer on the dielectric layer, and depositing a hard mask layer on the metal layer. The method further includes forming a gate opening by removing a portion of the hard mask layer and a portion of the metal layer. The method further includes depositing a spacer material layer on sidewalls of the gate opening and forming a channel, the channel including a TMC layer, at a bottom of the gate opening. The method further includes forming a gate structure on the channel and in the gate opening and removing the hard mask layer.