The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 24, 2023
Filed:
Nov. 13, 2020
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Mrunal Abhijith Khaderbad, Hsinchu, TW;
Dhanyakumar Mahaveer Sathaiya, Hsinchu, TW;
Huicheng Chang, Tainan, TW;
Ko-Feng Chen, Hsinchu, TW;
Keng-Chu Lin, Ping-Tung, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
The present disclosure is directed to a method for the fabrication of isolation structures between source/drain (S/D)) epitaxial structures of stacked transistor structures. The method includes depositing an oxygen-free dielectric material in an opening over a first epitaxial structure, where the oxygen-free dielectric material covers top surfaces of the first epitaxial structure and sidewall surfaces of the opening. The method also includes exposing the oxygen-free dielectric material to an oxidizing process to oxidize the oxygen-free dielectric material so that the oxidizing process does not oxidize a portion of the oxygen-free dielectric material on the first epitaxial structure. Further, etching the oxidized oxygen-free dielectric material and forming a second epitaxial layer on the oxygen-free dielectric material not removed by the etching to substantially the opening.