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For the Inventor, By the Inventor

Singapore, Singapore

Chin Hui Chong

This inventor holds 95 USPTO granted patents and 41 published patent applications and 5 EPO patents, primarily in Semiconductor Packaging (CPC class H01L24-48). Top assignee: Micron Technology Incorporated. Active years: 2006-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chin Hui Chong. Retrieved from https://idiyas.com/inventor/chin-hui-chong

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 95 

% Patents Active = 90.5


Average Co-Inventor Count = 3.2

ph-index = 13

Forward Citations = 921(Granted Patents)

Forward Citations (Not Self Cited) = 869(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Singapore, SG (2006 - 2024)
  • Braddell Hill, SG (2022 - 2024)

Company Filing History:

goldMedal95 out of 39,176 
 
Micron Technology Incorporated
 patents

Years Active: 2006-2026

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Areas of Expertise:
Multi-Chip Package
Dielectric Interposer
Stacked Capacitors
Microelectronic Devices
High Die Stack Structures
Conductive Vias
Integrated Circuit
Hybrid Substrates
Three-Dimensional Bonding
Surface Mount Devices
Electrical Connections
Nested Assemblies
95 patents (USPTO):Explore Patents
1. 12685220 - Modular systems in packages, and associated devices, systems, and methods (2026-07-14),
2. 12677678 - Semiconductor assemblies with systems and methods for using an interchangeable interposer to connect die to common substrate (2026-07-07),
3. 12660700 - Semiconductor devices having aligned front-end interface contacts and back-end interface contacts, and associated systems and methods (2026-06-16),
4. 12593706 - Multi-chip package with enhanced conductive layer adhesion (2026-03-31),
5. 12588527 - Dielectric interposer with electrical-connection cut-in (2026-03-24),
6. 12564096 - Nested semiconductor assemblies and methods for making the same (2026-02-24),
7. 12532781 - Stacked capacitors for semiconductor devices and associated systems and methods (2026-01-20),
8. 12525521 - Package substrate for a semiconductor device (2026-01-13),
9. 12512437 - Semiconductor device assemblies with balanced wires, and associated methods (2025-12-30),
10. 12432859 - Surface mount device bonded to an inner layer of a multi-layer substrate (2025-09-30),
11. 12431418 - Three dimensional semiconductor trace length matching and associated systems and methods (2025-09-30),
12. 12362319 - Cross stack bridge bonding devices and associated methods (2025-07-15),
13. 12362255 - Apparatus including direct-contact heat paths and methods of manufacturing the same (2025-07-15),
14. 12354939 - Multi-role semiconductor device substrates, semiconductor device assemblies employing the same, and methods for forming the same (2025-07-08),
15. 12315769 - Build-up package for integrated circuit devices, and methods of making same (2025-05-27),

Title: Inventor Chin Hui Chong - Revolutionizing Technology in Singapore

Introduction: Chin Hui Chong is a visionary inventor based in Singapore, SG, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Chin Hui Chong holds several patents in the areas of artificial intelligence, robotics, and sustainable energy solutions, showcasing his commitment to creating a more advanced and sustainable future.

Career Highlights: With a career spanning over two decades, Chin Hui Chong has worked with leading tech companies and research institutions to develop cutting-edge technologies that have revolutionized various industries.

Collaborations: Throughout his career, Chin Hui Chong has collaborated with top engineers, scientists, and researchers from around the world, fostering a culture of innovation and excellence in all his projects.

Conclusion: Inventor Chin Hui Chong's relentless pursuit of innovation and his passion for pushing the boundaries of technology have solidified his reputation as a pioneering figure in the field of invention.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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