The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 2025

Filed:

Mar. 03, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Hong Wan Ng, Singapore, SG;

Chin Hui Chong, Singapore, SG;

Kelvin Tan Aik Boo, Singapore, SG;

Seng Kim Ye, Singapore, SG;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/552 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/4846 (2013.01); H01L 23/49816 (2013.01); H01L 23/552 (2013.01); H01L 24/08 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 24/80 (2013.01); H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 2224/08225 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/49112 (2013.01); H01L 2224/80001 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06562 (2013.01);
Abstract

A semiconductor device assembly is provided. The assembly includes a substrate having an upper surface on which is disposed a first device contact, a keep-out region extending from a first side surface of the substrate to a second side surface of the substrate opposite the first, and at least one trace coupled to the first device contact and extending across the keep out region towards a third side surface of the substrate. The assembly further includes at least one semiconductor device disposed over the upper surface of the substrate and coupled to the first device contact. The keep-out region of the substrate is free from conductive structures other than the at least one trace.


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