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For the Inventor, By the Inventor

Singapore, Singapore

Choon Kuan Lee

This inventor holds 71 USPTO granted patents and 3 published patent applications and 4 EPO patents, primarily in Microelectronic Packaging (CPC class H01L). Top assignee: Micron Technology Incorporated. Active years: 2004-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Choon Kuan Lee. Retrieved from https://idiyas.com/inventor/choon-kuan-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 71 

% Patents Active = 91.5

 

Average Co-Inventor Count = 3.2

ph-index = 14

Forward Citations = 925(Granted Patents)

Forward Citations (Not Self Cited) = 883(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal71 out of 39,294 
 
Micron Technology Incorporated
 patents

Years Active: 2004-2025

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Areas of Expertise:
Integrated Circuit
Microelectronic Devices
Stacked Devices
Build-Up Package
Lead Frames
Conductive Vias
Interposer Structure
Semiconductor Packaging
Device Assemblies
Manufacturing Methods
Redistribution Elements
Face-to-Face Dice
71 patents (USPTO):Explore Patents
1. 12315769 - Build-up package for integrated circuit devices, and methods of making same (2025-05-27),
2. 11367667 - Build-up package for integrated circuit devices, and methods of making same (2022-06-21),
3. 11239128 - Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices (2022-02-01),
4. 11189548 - Pre-encapsulated lead frames for microelectronic device packages, and associated methods (2021-11-30),
5. 10593607 - Build-up package for integrated circuit devices, and methods of making same (2020-03-17),
6. 10448509 - Electronic device assemblies including conductive vias having two or more conductive elements (2019-10-15),
7. 10431513 - Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices (2019-10-01),
8. 10211114 - Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices (2019-02-19),
9. 10008468 - Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices (2018-06-26),
10. 9768121 - Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices (2017-09-19),
11. 9721874 - Pre-encapsulated lead frames for microelectronic device packages, and associated methods (2017-08-01),
12. 9640458 - Stacked microelectronic devices (2017-05-02),
13. 9530748 - Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices (2016-12-27),
14. 9362260 - Stacked packaged integrated circuit devices, and methods of making same (2016-06-07),
15. 9362141 - Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices (2016-06-07),

Title: Choon Kuan Lee - Pioneering Inventor from Singapore

Introduction: Choon Kuan Lee is a highly respected inventor hailing from Singapore, known for his groundbreaking contributions to various technological fields.

Latest Patents: Choon Kuan Lee holds several patents in the areas of electronics, telecommunications, and renewable energy, showcasing his innovative mindset and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Choon Kuan Lee has worked with leading tech companies and research institutions, consistently pushing the boundaries of what is possible in the world of innovation.

Collaborations: Throughout his career, Choon Kuan Lee has collaborated with top engineers, scientists, and researchers from around the globe, fostering a culture of creativity and excellence in all his projects.

Conclusion: Choon Kuan Lee's passion for innovation and his relentless pursuit of technological advancement continue to inspire the next generation of inventors and entrepreneurs worldwide.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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