The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 2026

Filed:

Aug. 27, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Seng Kim Ye, Singapore, SG;

Kelvin Tan Aik Boo, Singapore, SG;

Hong Wan Ng, Singapore, SG;

Chin Hui Chong, Singapore, SG;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 25/065 (2023.01); H01L 25/16 (2023.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49816 (2013.01); H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 25/0657 (2013.01); H01L 25/16 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 24/97 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/48147 (2013.01); H01L 2224/48225 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/0652 (2013.01); H01L 2225/06524 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1438 (2013.01); H01L 2924/19041 (2013.01);
Abstract

This document discloses techniques, apparatuses, and systems relating to a package substrate for a semiconductor device. A semiconductor device assembly is described that includes a packaged semiconductor device having one or more semiconductor dies coupled to a package-level substrate. The package-level substrate has a first surface at which first contact pads are disposed in a first configuration. The packaged semiconductor device is coupled with an additional package-level substrate that includes a second surface having second contact pads disposed in the first configuration and a third surface having third contact pads disposed in a second configuration different from the first configuration. The additional package-level substrate includes circuitry coupling the second contact pads the third contact pads to provide connectivity at the third contact pads. In doing so, an adaptively compatible semiconductor device may be assembled.


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