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For the Inventor, By the Inventor

Hsinchu, Taiwan

Chih-Chang Cheng

This inventor holds 75 USPTO granted patents and 13 published patent applications, primarily in Semiconductor Devices (CPC class H01L). Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2013-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chih-Chang Cheng. Retrieved from https://idiyas.com/inventor/chih-chang-cheng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 75 

% Patents Active = 80.0

Average Co-Inventor Count = 4.3

ph-index = 6

Forward Citations = 121(Granted Patents)

Forward Citations (Not Self Cited) = 83(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal75 out of 42,810 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2013-2025

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Areas of Expertise:
Noise Reduction
High Voltage Transistors
Isolation Structures
Embedded JFETs
Power MOSFETs
Triple Well Isolated Diode
Gate Structures
Field Effect Transistors
Resistive Protection Layer
Semiconductor Structures
Thermal Management
Fabrication Methods
75 patents (USPTO):Explore Patents
1. 12469798 - Layout to reduce noise in semiconductor devices (2025-11-11),
2. 12176407 - Method of forming a transistor device with a gate structure having a pair of recess regions and a resistive protection layer within (2024-12-24),
3. 12074208 - Method of making triple well isolated diode (2024-08-27),
4. 11923429 - Plate design to decrease noise in semiconductor devices (2024-03-05),
5. 11817396 - Layout to reduce noise in semiconductor devices (2023-11-14),
6. 11769812 - Semiconductor device having multiple wells and method of making (2023-09-26),
7. 11676997 - High voltage resistor with high voltage junction termination (2023-06-13),
8. 11532701 - Semiconductor isolation structure and method for making the semiconductor isolation structure (2022-12-20),
9. 11444169 - Transistor device with a gate structure having recesses overlying an interface between isolation and device regions (2022-09-13),
10. 11158739 - Semiconductor structure having field plate and associated fabricating method (2021-10-26),
11. 11107899 - Plate design to decrease noise in semiconductor devices (2021-08-31),
12. 11088085 - Layout to reduce noise in semiconductor devices (2021-08-10),
13. 11069805 - Embedded JFETs for high voltage applications (2021-07-20),
14. 11011610 - Plate design to decrease noise in semiconductor devices (2021-05-18),
15. 10957772 - Semiconductor device having multiple wells (2021-03-23),

Title: The Innovative Journey of Chih-Chang Cheng

Introduction:

Chih-Chang Cheng, a distinguished inventor hailing from Hsinchu, Taiwan, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents:

Chih-Chang Cheng's latest patents include cutting-edge advancements in semiconductor technology, renewable energy solutions, and artificial intelligence systems, showcasing his versatility and forward-thinking approach.

Career Highlights:

Throughout his illustrious career, Chih-Chang Cheng has held key positions in leading tech companies, where he spearheaded research and development projects that have revolutionized various industries. His expertise in patent law has also been instrumental in protecting his inventions and ensuring their commercial success.

Collaborations:

Chih-Chang Cheng has collaborated with top research institutions and universities worldwide, fostering a culture of innovation and knowledge exchange. His partnerships have led to the development of groundbreaking technologies that have had a lasting impact on society.

Conclusion:

In conclusion, Chih-Chang Cheng's relentless pursuit of innovation and his passion for creating transformative technologies have solidified his reputation as a visionary inventor. His contributions continue to inspire future generations of inventors to push the boundaries of what is possible in the world of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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