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Munich, Germany

Siltronic Ag

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USPTO Granted Patents = 318

% Expired Patents = 23.9

EPO Patents = 122

Trademarks = 4

Forward Citations = 545

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310 inventors (with patents filed for the assignee):

Wilfried Von Ammon (30 out of 36 patents)

Georg Pietsch (24 out of 26 patents)

Juergen Schwandner (21 out of 21 patents)

4. Reinhold Wahlich (18 out of 20 patents)

5. Katsuhiko Nakai (16 out of 16 patents)

6. Reinhard Schauer (15 out of 18 patents)

7. Thomas Buschhardt (14 out of 17 patents)

8. Martin Weber (14 out of 26 patents)

9. Michael Kerstan (13 out of 14 patents)

10. Peter Wiesner (13 out of 13 patents)

11. Timo Mueller (12 out of 12 patents)

12. Peter Storck (12 out of 13 patents)

13. Teruo Haibara (11 out of 12 patents)

14. Brian Murphy (11 out of 11 patents)

15. Andreas Sattler (10 out of 10 patents)

Core Competencies:

Epitaxial Layer

Silicon Wafer

Single Crystal

Monocrystalline

Wire Saw

Doping

Semiconductor Substrate

Crystal Growth

Polishing

Vapor Deposition

Cleaning Method

Classification

318 patents: Sort by Forward Citations

1. 12742253 - Device and method for producing a monocrystalline silicon rod in a zone-melting pulling system (2026-09-22),

2. 12729441 - Method and device for depositing an epitaxial layer on a substrate wafer made of semiconductor material (2026-09-08),

3. 12716652 - Device for drying semiconductor substrates (2026-08-25),

4. 12692621 - Method for depositing an epitaxial layer on a substrate wafer made of semiconductor material in a deposition device (2026-07-28),

5. 12680189 - Process for manufacturing a monocrystalline silicon semiconductor wafer, and monocrystalline silicon semiconductor wafer (2026-07-14),

6. 12662751 - Process for manufacturing semiconductor wafers containing a gas-phase epitaxial layer in a deposition chamber (2026-06-23),

7. 12637786 - Method for producing a gallium oxide layer on a substrate (2026-05-26),

8. 12635445 - Device for drying semiconductor substrates (2026-05-19),

9. 12635442 - Method for cleaning a semiconductor wafer (2026-05-19),

10. 12598938 - Device for drying semiconductor substrates (2026-04-07),

11. 12596062 - Method for classifying unknown particles on a surface of a semi-conductor wafer (2026-04-07),

12. 12558731 - Method for separating multiple slices of workpieces by means of a wire saw during a sequence of separation processes (2026-02-24),

13. 12553145 - Apparatus and method for producing a doped monocrystalline rod made of silicon (2026-02-17),

14. 12550680 - Method for testing the stress robustness of a semiconductor substrate (2026-02-10),

15. 12532714 - Method for producing discs from a cylindrical rod made of a semiconductor material (2026-01-20),

Company Overview

Siltronic AG, headquartered in Munich, Germany, is a leading manufacturer of silicon wafers for the semiconductor industry. The company specializes in the development and production of high-quality monocrystalline silicon wafers, which are essential for various electronic applications. Siltronic's expertise encompasses advanced technologies such as epitaxial layer growth, crystal growth, and doping processes. With a strong focus on innovation, Siltronic plays a crucial role in enabling the advancement of semiconductor technologies globally.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Nov 3 2026

318 Patents

#24 in W-8000 Munich

#187 in Germany

#2,831 in the World

Munich, Germany

Siltronic Ag

Forward Citations = 545

310 inventors:

Wilfried Von Ammon (30 out of 36 patents)

Georg Pietsch (24 out of 26 patents)

Juergen Schwandner (21 out of 21 patents)

4. Reinhold Wahlich (18 out of 20 patents)

5. Katsuhiko Nakai (16 out of 16 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Siltronic Ag. Retrieved from https://idiyas.com/company/siltronic-ag

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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