The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2026
Filed:
Mar. 28, 2022
Siltronic Ag, Munich, DE;
Thomas Stettner, Waging am See, DE;
SILTRONIC AG, Munich, DE;
Abstract
Disclosed is a process for manufacturing semiconductor wafers containing a gas-phase epitaxial layer in a deposition chamber, involving removing, from the deposition chamber by etching the deposition chamber, material settled in the deposition chamber during preceding coating processes; performing successive coating operations in the etched deposition chamber, each of said coating operations involving having a robot place a substrate wafer on a susceptor having a circular circumference, the robot moving the substrate wafer into a drop-off position and placing it on the susceptor, the center of the substrate wafer not lying over the center of the susceptor in the drop-off position because of a predefined corrective parameter; and depositing an epitaxial layer on the substrate wafer such that a semiconductor wafer containing an epitaxial layer is produced, characterized in that for each first substrate wafer moved by the robot into the drop-off position, the value of the predefined corrective parameter corresponds to a mean value of differences in the positions of a number of previously coated substrate wafers which had been the first substrate wavers to be coated following a preceding chamber etching operation.