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San Jose, CA, United States of America

Adeia Semiconductor Technologies LLC

USPTO Granted Patents = 31

EPO Patents = 4

Forward Citations = 3

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50 inventors (with patents filed for the assignee):

Rajesh Katkar (9 out of 227 patents)

Cyprian Emeka Uzoh (8 out of 429 patents)

Belgacem Haba (8 out of 670 patents)

4. Javier A DeLaCruz (7 out of 136 patents)

5. Liang Wang (5 out of 127 patents)

6. Hong Shen (4 out of 73 patents)

7. Min Tao (3 out of 20 patents)

8. Patrick J Variot (3 out of 34 patents)

9. Guilian Gao (2 out of 120 patents)

10. Arkalgud R Sitaram (2 out of 59 patents)

11. Ilyas Mohammed (2 out of 285 patents)

12. Laura Wills Mirkarimi (2 out of 90 patents)

13. Richard E Perego (2 out of 145 patents)

14. Stephen L Morein (1 out of 160 patents)

15. Shaowu Huang (1 out of 51 patents)

31 patents: Sort by Forward Citations

1. RE51016 - Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assemblies (2026-08-25),

2. 12708053 - Direct-bonded optoelectronic devices (2026-08-11),

3. RE50965 - System and method for providing 3D wafer assembly with known-good-dies (2026-07-21),

4. 12640483 - Radio frequency device packages (2026-05-26),

5. 12635510 - Interconnect structures and methods for forming same (2026-05-19),

6. 12564086 - Structures for low temperature bonding using nanoparticles (2026-02-24),

7. 12557659 - Wire bonding method and apparatus for electromagnetic interference shielding (2026-02-17),

8. 12557615 - Methods for bonding semiconductor elements (2026-02-17),

9. 12537783 - Media appliance (2026-01-27),

10. RE50741 - Semiconductor module and portable apparatus provided with semiconductor module (2026-01-06),

11. 12500209 - Embedded organic interposer for high bandwidth (2025-12-16),

12. 12476212 - 3D-interconnect (2025-11-18),

13. 12425696 - Emulated television tuner (2025-09-23),

14. 12394728 - Method of forming a region shielding within a package of a microelectronic device (2025-08-19),

15. 12381117 - Through-dielectric-vias (TDVs) for 3D integrated circuits in silicon (2025-08-05),

Adeia Semiconductor Technologies LLC specializes in advanced semiconductor solutions tailored for a variety of applications. Focused on innovation, the company develops cutting-edge technologies that enhance performance, efficiency, and reliability in electronic devices. Adeia’s expertise encompasses a range of semiconductor products, including integrated circuits and components essential for modern computing and communication systems. Committed to driving progress in the semiconductor industry, Adeia partners with leading technology firms to deliver state-of-the-art solutions that meet the demands of today’s fast-paced technological landscape.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Sep 22 2026

31 Patents

#259 in San Jose, CA

#2,607 in California

#10,904 in US

#21,205 in the World

San Jose, CA, United States of America

Adeia Semiconductor Technologies LLC

Forward Citations = 3

50 inventors:

Rajesh Katkar (9 out of 227 patents)

Cyprian Emeka Uzoh (8 out of 429 patents)

Belgacem Haba (8 out of 670 patents)

4. Javier A DeLaCruz (7 out of 136 patents)

5. Liang Wang (5 out of 127 patents)

Please report any incorrect information to [email protected]

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