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For the Inventor, By the Inventor

Taipei, Taiwan

Yung-Hsu Wu

USPTO Granted Patents = 54 

Average Co-Inventor Count = 5.3

ph-index = 8

Forward Citations = 184(Granted Patents)

Forward Citations (Not Self Cited) = 170(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Hsin-Chu, TW (2017)
  • Taipei, TW (2014 - 2024)

Company Filing History:

goldMedal54 out of 40,850 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2014-2025

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Areas of Expertise:
Semiconductor Device
Self-Aligned Conductive Features
Integrated Circuit Interconnect
Multi-Metal Fill
Self-Assembly Layer
Spacer-Damage-Free Etching
Double Patterning Lithography
Trench Formation
Chemical-Mechanical Planarization
Void Formation
High Selectivity Spacers
Etching Stop Layer
54 patents (USPTO):Explore Patents
1. 12412831 - Semiconductor device structure and methods of forming the same (2025-09-09),
2. 12394633 - Method of fabricating semiconductor device with reduced trench distortions (2025-08-19),
3. 12300600 - Semiconductor device with self-aligned conductive features (2025-05-13),
4. 12080593 - Barrier-less structures (2024-09-03),
5. 12062611 - Integrated circuit interconnect structures with air gaps (2024-08-13),
6. 12009202 - Using a self-assembly layer to facilitate selective formation of an etching stop layer (2024-06-11),
7. 11894238 - Method of fabricating semiconductor device with reduced trench distortions (2024-02-06),
8. 11860550 - Multi-metal fill with self-aligned patterning and dielectric with voids (2024-01-02),
9. 11848190 - Barrier-less structures (2023-12-19),
10. 11532552 - Method and apparatus for forming self-aligned via with selectively deposited etching stop layer (2022-12-20),
11. 11422475 - Multi-metal fill with self-aligned patterning and dielectric with voids (2022-08-23),
12. 11404367 - Method for forming semiconductor device with self-aligned conductive features (2022-08-02),
13. 11387113 - Method of fabricating semiconductor device with reduced trench distortions (2022-07-12),
14. 11244898 - Integrated circuit interconnect structures with air gaps (2022-02-08),
15. 11069526 - Using a self-assembly layer to facilitate selective formation of an etching stop layer (2021-07-20),

Title: Innovator Spotlight: Yung-Hsu Wu - Pioneering Semiconductor Technologies in Taipei

Introduction:

Yung-Hsu Wu is a visionary inventor based in Taipei, Taiwan, with a remarkable track record of 48 patents to his name. His groundbreaking work in semiconductor technology has revolutionized the industry and paved the way for future innovations.

Latest Patents:

One of Yung-Hsu Wu's latest patents is the "Method of fabricating semiconductor device with reduced trench distortions." This method involves a complex process of forming trenches and spacers to optimize the fabrication of semiconductor devices. Another notable patent is the "Multi-metal fill with self-aligned patterning and dielectric with voids," which addresses photolithography overlay errors in interconnect formation processes.

Career Highlights:

Yung-Hsu Wu is a key figure at Taiwan Semiconductor Manufacturing Company Ltd. (TSMC), where he has played a pivotal role in driving technological advancements in semiconductor manufacturing. His expertise and contributions have significantly enhanced TSMC's position as a global leader in the semiconductor industry.

Collaborations:

Throughout his career, Yung-Hsu Wu has collaborated closely with industry experts such as Shau-Lin Shue and Chung-Ju Lee. Together, they have worked on cutting-edge projects that have pushed the boundaries of semiconductor technology and set new standards for innovation in the field.

Conclusion:

In conclusion, Yung-Hsu Wu's prolific career as an inventor and his numerous patents underscore his dedication to advancing semiconductor technology. His groundbreaking contributions have not only shaped the industry but also inspired a new generation of innovators to push the boundaries of what is possible in the world of semiconductors.

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