Yi-Ming Sheu

This inventor holds 51 USPTO granted patents and 1 published patent application, primarily in Semiconductor Devices (CPC class H01L). Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2003-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yi-Ming Sheu. Retrieved from https://idiyas.com/inventor/yi-ming-sheu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 51 (Patent Applications = 1)

% Patents Active = 82.4

Average Co-Inventor Count = 4.4

ph-index = 9

Forward Citations = 328(Granted Patents)

Forward Citations (Not Self Cited) = 308(Dec 10, 2025)

Inventors with similar research interests:

Company Filing History:

51 out of 42,810

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

Years Active: 2003-2026

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Areas of Expertise:

Multi-Gate Device

Integrated Circuit

Semiconductor Structure

Epitaxial Channel

Doping Technique

Stress Memorization

Tunnel Field-Effect Transistor

Short Channel Effects

Metal Gate Structure

Counter Pocket Implant

Channel Strain Inducing

Manufacturing Method

51 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12581697 - Semiconductor device with silicide-embedded stressor source and drain structure (2026-03-17),

2. 11955554 - Method of fabricating a multi-gate device (2024-04-09),

3. 11804546 - Structure and method for integrated circuit (2023-10-31),

4. 11715785 - Semiconductor device and manufacturing method thereof (2023-08-01),

5. 11502198 - Structure and method for integrated circuit (2022-11-15),

6. 11393926 - Multi-gate device (2022-07-19),

7. 11239341 - Horizontal gate all-around device having wrapped-around source and drain (2022-02-01),

8. 11145762 - Multi-gate device (2021-10-12),

9. 11004955 - Semiconductor device and manufacturing method thereof (2021-05-11),

10. 10868175 - Method for manufacturing semiconductor structure (2020-12-15),

11. 10861972 - Channel strain inducing architecture and doping technique at replacement poly gate (RPG) stage (2020-12-08),

12. 10741688 - Structure and method for integrated circuit (2020-08-11),

13. 10734500 - Horizontal gate all-around device having wrapped-around source and drain (2020-08-04),

14. 10522657 - Semiconductor device and manufacturing method thereof (2019-12-31),

15. 10516047 - Structure and formation method of semiconductor device structure (2019-12-24),

Title: The Innovative Journey of Yi-Ming Sheu

Introduction: Yi-Ming Sheu is a pioneering inventor hailing from Hsinchu, Taiwan. His relentless pursuit of innovation has led to groundbreaking developments in various fields.

Latest Patents: Yi-Ming Sheu's latest patents showcase his expertise in cutting-edge technologies, including advancements in semiconductor manufacturing processes and renewable energy solutions.

Career Highlights: With a career spanning over two decades, Yi-Ming Sheu has held key roles in leading tech companies, contributing significantly to the development of next-generation products. His work has been instrumental in shaping the industry landscape.

Collaborations: Throughout his career, Yi-Ming Sheu has collaborated with top research institutions and universities worldwide, fostering a culture of innovation and knowledge exchange. His partnerships have resulted in transformative projects with far-reaching impacts.

Conclusion: Yi-Ming Sheu's dedication to innovation and his remarkable contributions to the field of technology make him a true trailblazer. His inventive spirit continues to inspire future generations of inventors and researchers.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: