Hsinchu, Taiwan

Wun-Jie Lin

This inventor holds 89 USPTO granted patents and 37 published patent applications, primarily in ESD Protection Circuits (CPC class H02H9-046). Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., National Taiwan University. Active years: 2014-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Wun-Jie Lin. Retrieved from https://idiyas.com/inventor/wun-jie-lin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 89 

% Patents Active = 88.8

Average Co-Inventor Count = 3.8

ph-index = 8

Forward Citations = 579(Granted Patents)

Forward Citations (Not Self Cited) = 522(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Taiwan, CN (2016)
  • Hsin-Chu, TW (2014 - 2024)

Company Filing History:


Years Active: 2014-2026

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Areas of Expertise:
Electrostatic Discharge
ESD Protection Circuit
Integrated Circuit
Manufacturing Method
Clamp Device
Guard Ring
Field-Effect Device
Low-Leakage ESD
Latch-Up Prevention
Nanostructure Device
Back End of Line
Capacitor Cell
89 patents (USPTO):Explore Patents

Title: Profile of Wun-Jie Lin: Innovator in Electrostatic Discharge Protection Technologies

Introduction: Wun-Jie Lin is a prominent inventor based in Hsinchu, Taiwan. With a remarkable portfolio of 71 patents, Wun-Jie has made significant contributions to the field of semiconductor technology, particularly in electrostatic discharge (ESD) protection circuits.

Latest Patents: Among his latest innovations are two notable patents. The first is titled "Circuit and method for high voltage tolerant ESD protection". This invention details an electrostatic discharge protection circuit that incorporates a first transistor coupled to a pad, a second transistor linked to ground, a stack of transistors connected to the first, and an ESD clamp between the stack and the ground. The second patent is focused on an "Electrostatic discharge (ESD) array with back end of line (BEOL) connection in a carrier wafer". This apparatus involves an internal circuit patterned in a device wafer and various ESD circuits in a carrier wafer, protecting the internal circuit from transient ESD events.

Career Highlights: Wun-Jie Lin currently works with Taiwan Semiconductor Manufacturing Company Limited, a leading entity in the semiconductor industry. His expertise and innovative approach have helped advance the technology in ESD protection, ensuring semiconductor reliability in various applications.

Collaborations: Wun-Jie has collaborated with talented coworkers Jen-Chou Tseng and Yu-Ti Su. Their collective efforts have led to pioneering solutions in the area of electrostatic discharge protection.

Conclusion: Wun-Jie Lin stands out as a key figure in the realm of ESD protection technology. His extensive patent portfolio reflects a commitment to innovation and problem-solving in semiconductor design, contributing significantly to the field and enhancing the safety and performance of electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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