The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2025
Filed:
Mar. 27, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Po-Chia Lai, Fremont, CA (US);
Kuo-Ji Chen, Taipei county, TW;
Wen-Hao Chen, Hsin-Chu, TW;
Wun-Jie Lin, Hsinchu, TW;
Yu-Ti Su, Tainan, TW;
Rabiul Islam, Austin, TX (US);
Shu-Yi Ying, Hsinchu County, TW;
Stefan Rusu, Sunnyvale, CA (US);
Kuan-Te Li, Taoyuan, TW;
David Barry Scott, Plano, TX (US);
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
An integrated circuit design method includes receiving an integrated circuit design, and determining a floor plan for the integrated circuit design. The floor plan includes an arrangement of a plurality of functional cells and a plurality of tap cells. Potential latchup locations in the floor plan are determined, and the arrangement of at least one of the functional cells or the tap cells is modified based on the determined potential latchup locations.