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For the Inventor, By the Inventor

Hsinchu, Taiwan

Wu-An Weng

This inventor holds 13 USPTO granted patents and 3 published patent applications, primarily in Semiconductor Fabrication. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Macronix International Co., Ltd.. Active years: 1997-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Wu-An Weng. Retrieved from https://idiyas.com/inventor/wu-an-weng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 13 

% Patents Active = 76.9

Average Co-Inventor Count = 2.7

ph-index = 4

Forward Citations = 36(Granted Patents)


Company Filing History:

goldMedal9 out of 43,553 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal4 out of 3,609 
 
Macronix International Co., Ltd.
 patents

Years Active: 1997-2026

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Areas of Expertise:
Integrated Circuit
MRAM Devices
Automated Inspection
Deep Trench Capacitor
Wafer Defect Monitoring
Semiconductor Packaging
Vertical Semiconductor
Stress Memory Effect
Self-Aligned Process
High Density Circuits
Streamlined Process
13 patents (USPTO):Explore Patents
1. 12648498 - Surface treatment in integrated circuit package and method (2026-06-02),
2. 11961770 - Automated inspection tool (2024-04-16),
3. 11171065 - Automated inspection tool (2021-11-09),
4. 10490463 - Automated inspection tool (2019-11-26),
5. 9972771 - MRAM devices and methods of forming the same (2018-05-15),
6. 9472690 - Deep trench capacitor manufactured by streamlined process (2016-10-18),
7. 9012296 - Self-aligned deep trench capacitor, and method for making the same (2015-04-21),
8. 8853048 - Streamlined process for vertical semiconductor devices (2014-10-07),
9. 7795644 - Integrated circuits with stress memory effect and fabrication methods thereof (2010-09-14),
10. 7141179 - Monitoring semiconductor wafer defects below one nanometer (2006-11-28),
11. 7041565 - Method for fabricating a capacitor in a semiconductor device (2006-05-09),
12. 5691216 - Integrated circuit self-aligning process and apparatus (1997-11-25),
13. 5621697 - High density integrated circuit with bank select structure (1997-04-15),

Title: Wu-An Weng: Innovator in Automated Inspection Technology

Introduction

Wu-An Weng is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of automated inspection tools, holding a total of 12 patents. His work focuses on enhancing the efficiency and accuracy of wafer processing in semiconductor manufacturing.

Latest Patents

One of Wu-An Weng's latest patents is an automated inspection tool designed for processing wafers. This innovative tool features a housing that encloses a processing chamber, along with an input/output port that allows wafers to pass through. Within the processing chamber, a back-side macro-inspection system is implemented to image the back side of the wafer. Additionally, a front-side macro-inspection system captures images of the front side at a first image resolution. To further enhance inspection capabilities, a front-side micro-inspection system is also included, which images the front side at a higher resolution than the macro system.

Career Highlights

Wu-An Weng has had a distinguished career, working with leading companies in the semiconductor industry. He has been associated with Taiwan Semiconductor Manufacturing Company Limited and Macronix International Co., Ltd. His experience in these organizations has allowed him to develop cutting-edge technologies that improve wafer inspection processes.

Collaborations

Throughout his career, Wu-An Weng has collaborated with notable colleagues, including Chen-Chien Chang and Chia-Han Lin. These partnerships have contributed to the advancement of innovative solutions in the field of semiconductor manufacturing.

Conclusion

Wu-An Weng's contributions to automated inspection technology have positioned him as a key figure in the semiconductor industry. His patents and collaborations reflect his commitment to innovation and excellence in wafer processing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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