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Vijay Parthasarathy

This inventor holds 61 USPTO granted patents and 1 published patent application and 6 EPO patents, primarily in High-Voltage Transistors (CPC class H01L). Top assignees: Power Integrations, Inc., Freescale Semiconductor,inc., Maxim Integrated Products, Inc.. Active years: 2003-2023.

USPTO Granted Patents = 61 (Patent Applications = 1)

% Patents Active = 50.8

EPO Patents = 6 (Patent Applications = 7)

Average Co-Inventor Count = 2.6

ph-index = 15

Forward Citations = 564(Granted Patents)

Forward Citations (Not Self Cited) = 455(Dec 10, 2025)

Inventors with similar research interests:

Location History:

Phoenix, AZ (US) (2003 - 2009)
Mountain View, CA (US) (2011 - 2016)
Palo Alto, CA (US) (2007 - 2017)
Sunnyvale, CA (US) (2014 - 2023)

Company Filing History:

35 out of 1,027

Power Integrations, Inc.

patents

10 out of 5,491

Freescale Semiconductor,inc.

patents

9 out of 1,298

Maxim Integrated Products, Inc.

Years Active: 2003-2023

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Areas of Expertise:

LDMOS Transistors

High-Voltage Transistors

Vertical Transistor

Power Integrated Circuit

Field-Effect Transistor

RESURF Layer

Gate Capacitance

Silicon Pillar

Sensing FET

Doping Materials

Integrated Resistor

Checkerboard Layout

61 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11705485 - LDMOS transistors with breakdown voltage clamps (2023-07-18),

2. 11557588 - Multi-transistor device including first and second LDMOS transistors having respective drift regions separated in a thickness direction by a shared RESURF layer (2023-01-17),

3. 11195909 - LDMOS transistors with breakdown voltage clamps (2021-12-07),

4. 10964694 - Multi-transistor device including first and second LDMOS transistors having respective drift regions separated in a thickness direction by a shared RESURF layer (2021-03-30),

5. 10833164 - LDMOS transistors and associated systems and methods (2020-11-10),

6. 10269916 - LDMOS transistors and associated systems and methods (2019-04-23),

7. 10199475 - LDMOS transistors and associated systems and methods (2019-02-05),

8. 9972681 - High voltage vertical semiconductor device with multiple pillars in a racetrack arrangement (2018-05-15),

9. 9768274 - Laterally-graded doping of materials (2017-09-19),

10. 9660053 - High-voltage field-effect transistor having multiple implanted layers (2017-05-23),

11. 9601613 - Gate pullback at ends of high-voltage vertical transistor structure (2017-03-21),

12. 9472630 - Deposit/etch for tapered oxide (2016-10-18),

13. 9263564 - Power integrated circuit with incorporated sense FET (2016-02-16),

14. 9196681 - Metal oxide semiconductor field effect transistor with reduced surface field folding (2015-11-24),

15. 9196680 - Metal oxide semiconductor field effect transistor with reduced surface field folding (2015-11-24),

Title: **Vijay Parthasarathy: Innovator in LDMOS Technology**

Introduction

Vijay Parthasarathy, based in Sunnyvale, CA, is a distinguished inventor with an impressive portfolio of 61 patents primarily focused on advancements in LDMOS transistor technology. His innovative contributions have significantly impacted the semiconductor industry, leading to various enhancements in device performance and reliability.

Latest Patents

Among his latest patents, one notable invention is the LDMOS transistor with breakdown voltage clamps. This device features a lateral double-diffused metal-oxide-semiconductor (LDMOS) structure that incorporates a breakdown voltage clamp, a drain n+ region, a source n+ region, a gate, and a p-type reduced surface field (PRSF) layer with one or more bridge portions extending below the drain n+ region. Moreover, he has developed another LDMOS transistor featuring a drain n+ region, a source n+ region, a gate, an n-type reduced surface field (NRSF) layer, a PRSF layer, and a p-type buried layer (PBL) disposed beneath the PRSF layer in a strategic thickness orientation. Additionally, Vijay has devised a multi-transistor device that includes first and second LDMOS transistors with respective drift regions, separated in a thickness direction by a shared RESURF layer, showcasing his capability to integrate complex functionalities into semiconductor devices.

Career Highlights

Vijay's professional journey includes significant tenure at leading technology firms such as Power Integrations, Inc. and Freescale Semiconductor, Inc. His work at these organizations has been pivotal in driving forward semiconductor innovation, particularly in LDMOS technologies that are fundamental to modern electronic devices.

Collaborations

Throughout his career, Vijay Parthasarathy has collaborated with esteemed colleagues including Sujit Banerjee and Vishnu Khemka. These partnerships have allowed for the exchange of ideas and expertise, further enhancing the innovative processes behind his patented technologies.

Conclusion

Vijay Parthasarathy stands out as a prolific inventor whose contributions to the field of LDMOS technology have greatly influenced the advancement of semiconductor applications. With a robust portfolio of patents and significant industry experience, he continues to be an inspiring figure in the world of innovation.

Profile summary based on public USPTO records.

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