The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2015
Filed:
Jun. 24, 2014
Maxim Integrated Products, Inc., San Jose, CA (US);
Vishnu Khemka, Phoenix, AZ (US);
Ronghua Zhu, Chandler, AZ (US);
Tahir Arif Khan, Gilbert, AZ (US);
Vijay Parthasarathy, Sunnyvale, CA (US);
MAXIM INTEGRATED PRODUCTS, INC., San Jose, CA (US);
Abstract
A laterally diffused metal oxide semiconductor field effect transistor (LDMOSFET) includes: a source contact region, a gate contact region, a drain contact region, and an n-type buried layer. The LDMOSFET also includes a p-type body region formed in an n-type epitaxial layer, the p-type body region directly contacting the source contact region and extending past an end of the source contact region toward the drain contact region. The LDMOSFET also includes a p-type reduced surface field (PRSF) region formed in the n-type epitaxial layer, the PRSF region disposed between the p-type body region and the n-type buried layer. The LDMOSFET also includes an n-type drift region formed in the n-type epitaxial layer, the n-type drift region directly contacting the drain contact region. The LDMOSFET also includes an n-type diffusion region in the n-type epitaxial layer, the n-type diffusion region electrically connecting the n-type buried layer with the n-type drift region.