The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2021

Filed:

Feb. 19, 2019
Applicant:

Maxim Integrated Products, Inc., San Jose, CA (US);

Inventors:

Vipindas Pala, San Jose, CA (US);

Vijay Parthasarathy, Sunnyvale, CA (US);

Badredin Fatemizadeh, Palo Alto, CA (US);

Marco A. Zuniga, Berkeley, CA (US);

John Xia, Fremont, CA (US);

Assignee:

MAXIM INTEGRATED PRODUCTS, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/78 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/823418 (2013.01); H01L 21/823462 (2013.01); H01L 27/0688 (2013.01); H01L 29/063 (2013.01); H01L 29/0873 (2013.01); H01L 29/7816 (2013.01);
Abstract

A multi-transistor device includes first and second lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistors sharing a first p-type reduced surface field (RESURF) layer and a first drain n+ region. In certain embodiments, the first LDMOS transistor includes a first drift region, the second LDMOS transistor includes a second drift region, and the first and second drift regions are at least partially separated by the first p-type RESURF layer in a thickness direction.


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