Tokyo, Japan

Tomohisa Konno

This inventor holds 18 USPTO granted patents and 3 published patent applications and 5 EPO patents, primarily in Semiconductor Processing. Top assignees: Jsr Corporation, International Business Machines Corporation, Jrs Corporation. Active years: 2003-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tomohisa Konno. Retrieved from https://idiyas.com/inventor/tomohisa-konno

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 18 

% Patents Active = 66.7

 

Average Co-Inventor Count = 4.7

ph-index = 8

Forward Citations = 146(Granted Patents)


Location History:

  • Tokyo, JP (2003 - 2007)
  • Chuo-Ku, JP (2004 - 2009)
  • Mie, JP (2004 - 2013)
  • Yokkaichi, JP (2013)
  • Mei, JP (2013)

Company Filing History:


Years Active: 2003-2013

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Areas of Expertise:
Chemical Mechanical Polishing
Semiconductor Device
Planarization Processes
FinFET Devices
Rubber Compositions
Cleaning Composition
Shallow Trench Isolation
Replacement Metal Gate
Crosslinked Rubber Particles
Diene-Based Rubber
Manufacturing Process
Aqueous Dispersion
18 patents (USPTO):Explore Patents

Title: Tomohisa Konno: Pioneering Innovator in Tokyo

Introduction: Tomohisa Konno, a visionary inventor based in Tokyo, Japan, has made significant contributions to the field of semiconductor technology through his dedication to innovation and relentless pursuit of excellence. With 18 patents to his name, Konno's work continues to shape the future of technology and inspire the next generation of inventors.

Latest Patents: Among his latest patents is the "Chemical Mechanical Polishing Aqueous Dispersion and Chemical Mechanical Polishing Method for Semiconductor Device". This invention involves a unique combination of water-soluble polymers, oxidizing agents, and abrasive grains to achieve precise chemical mechanical polishing for semiconductor devices. Another notable patent is the "Chemical Mechanical Planarization with Overburden Mask", a method that enables precise planarization of semiconductor wafers to expose underlying layers.

Career Highlights: Konno has made significant contributions while working at reputable companies such as JSR Corporation and International Business Machines Corporation (IBM). His expertise in semiconductor technology has led to groundbreaking innovations that have advanced the industry's capabilities.

Collaborations: Throughout his career, Konno has collaborated with esteemed colleagues such as Yoshiyuki Udagawa and Toshihiro Tadaki. Their collective expertise and dedication to innovation have resulted in groundbreaking inventions that have set new standards in the field of semiconductor technology.

Conclusion: Tomohisa Konno's innovative spirit and commitment to excellence have established him as a pioneering figure in the world of inventors. His patents and collaborations have not only shaped the future of technology but have also inspired a new generation of inventors to push the boundaries of what is possible in the field of semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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