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For the Inventor, By the Inventor

Hsinchu, Taiwan

Tjandra Winata Karta

USPTO Granted Patents = 16

Average Co-Inventor Count = 4.8

ph-index = 7

Forward Citations = 297(Granted Patents)


Location History:

  • Chu-Pei, TW (2008 - 2012)
  • Hsin-Chu County, TW (2010 - 2013)
  • Hsinchu, TW (2009 - 2014)

Company Filing History:

goldMedal16 out of 40,635 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2008-2014

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16 patents (USPTO):Explore Patents
1. 8704383 - Silicon-based thin substrate and packaging schemes (2014-04-22),
2. 8551813 - Wafer level IC assembly method (2013-10-08),
3. 8334170 - Method for stacking devices (2012-12-18),
4. 8247267 - Wafer level IC assembly method (2012-08-21),
5. 8232183 - Process and apparatus for wafer-level flip-chip assembly (2012-07-31),
6. 8174129 - Silicon-based thin substrate and packaging schemes (2012-05-08),
7. 8049323 - Chip holder with wafer level redistribution layer (2011-11-01),
8. 7977155 - Wafer-level flip-chip assembly methods (2011-07-12),
9. 7863742 - Back end integrated WLCSP structure without aluminum pads (2011-01-04),
10. 7846769 - Stratified underfill method for an IC package (2010-12-07),
11. 7842548 - Fixture for P-through silicon via assembly (2010-11-30),
12. 7838424 - Enhanced reliability of wafer-level chip-scale packaging (WLCSP) die separation using dry etching (2010-11-23),
13. 7804177 - Silicon-based thin substrate and packaging schemes (2010-09-28),
14. 7656042 - Stratified underfill in an IC package (2010-02-02),
15. 7514775 - Stacked structures and methods of fabricating stacked structures (2009-04-07),

Title: Tjandra Winata Karta: Innovator in Semiconductor Packaging

Introduction

Tjandra Winata Karta is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor packaging, holding a total of 16 patents. His innovative work has advanced the technology used in the manufacturing and assembly of semiconductor devices.

Latest Patents

Among his latest patents are the "Silicon-based thin substrate and packaging schemes" and the "Wafer level IC assembly method." The silicon-based thin package substrate is designed for packaging semiconductor chips, featuring a thickness of less than about 200 μm. This substrate includes multiple traces that connect BGA balls and solder bumps, allowing for efficient mounting of semiconductor chips. The wafer level IC assembly method involves a mother device wafer with copper posts for electrical connections. Solder is formed on these posts, enabling the bonding of dies to the wafer through a reflow process.

Career Highlights

Tjandra is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work has been instrumental in developing advanced packaging solutions that enhance the performance and reliability of semiconductor devices.

Collaborations

He has collaborated with notable colleagues, including Clinton Chao and Chien-Hsiun Lee, contributing to various projects that push the boundaries of semiconductor technology.

Conclusion

Tjandra Winata Karta's innovative contributions to semiconductor packaging have established him as a key figure in the industry. His patents reflect a commitment to advancing technology and improving manufacturing processes.

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