Chandler, AZ, United States of America

Sujit Sharan

This inventor holds 199 USPTO granted patents and 20 published patent applications and 5 EPO patents, primarily in Semiconductor Packaging (CPC class H01L25-0655). Top assignees: Micron Technology Incorporated, Intel Corporation, Applied Materials, Inc.. Active years: 1996-2026.

USPTO Granted Patents = 199 

% Patents Active = 82.9

 

Average Co-Inventor Count = 2.7

ph-index = 22

Forward Citations = 2,575(Granted Patents)

Forward Citations (Not Self Cited) = 2,472(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Boise, ID (US) (1996 - 2009)
  • Gilbert, AZ (US) (2009 - 2010)
  • Chandler, AZ (US) (2002 - 2024)

Company Filing History:


Years Active: 1996-2026

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Areas of Expertise:
High Bandwidth Optical Interconnection
Substrateless Embedded Multi-Die
Heterogeneous Integration
Conductive Pad Layers
EMIB Architecture
Silicon Bridges
Multi-Chip Package
Low-Inductance Current Paths
Passive Components
Signal Routing
Guard Ring Design
Capacitor Die
199 patents (USPTO):Explore Patents

Title: Sujit Sharan: Driving Innovations with 181 Patents

Introduction:

Sujit Sharan, a visionary inventor hailing from Chandler, AZ, has made significant contributions to the field of technology through his numerous patents. With an impressive portfolio of 181 patents to his name, Sharan's expertise lies in areas such as electronics packaging and heterogeneous integration. This article delves into his latest patents, career highlights, collaborations, and the impact of his inventions.

Latest Patents:

Among Sujit Sharan's recent patents is "Nested Architectures for Enhanced Heterogeneous Integration." This invention focuses on electronic packages and the methods used to form them. By incorporating a base substrate with through-substrate vias, along with specialized components and cavities, this innovation offers improved performance and efficiency in electronic packaging.

Another notable invention by Sharan is the "Capacitor Die Embedded in Package Substrate for Providing Capacitance to Surface Mounted Die." This patent introduces a package substrate with a die package located beneath the power delivery interface in a die. By including accessible connection terminals and metal-insulator-metal layers, this invention enhances the connection and efficiency of the integrated circuit.

Career Highlights:

During his illustrious career, Sujit Sharan has worked with several renowned companies, including Micron Technology Incorporated and Intel Corporation. These industry giants have provided him with a platform to explore and bring his innovative ideas to reality. With his expertise in electronics packaging and integration, Sharan has played a crucial role in shaping advanced technologies in these organizations.

Collaborations:

Sujit Sharan has had the opportunity to collaborate with renowned industry professionals such as Gurtej S Sandhu and Kirk Prall. These collaborations have allowed for the exchange of knowledge and ideas, leading to cutting-edge innovations and advancements in the field. Through teamwork and shared expertise, Sharan has leveraged the power of collaboration to drive technological progress.

Conclusion:

Sujit Sharan's remarkable journey as an inventor and his extensive patent portfolio reflect his deep understanding and expertise in electronics packaging and integration. His inventions, such as nested architectures for enhanced heterogeneous integration and capacitor die-embedding, have undoubtedly contributed to the advancement of technology. As a skilled innovator and collaborator, Sharan continues to leave an indelible mark on the industry, inspiring future generations of inventors and pushing the boundaries of what is possible in the world of technology.

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