The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2024

Filed:

Oct. 09, 2023
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Henning Braunisch, Chandler, AZ (US);

Chia-Pin Chiu, Tempe, AZ (US);

Aleksandar Aleksov, Chandler, AZ (US);

Hinmeng Au, Phoenix, AZ (US);

Stefanie M. Lotz, Phoenix, AZ (US);

Johanna M. Swan, Scottsdale, AZ (US);

Sujit Sharan, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 23/13 (2006.01); H01L 25/065 (2023.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5385 (2013.01); H01L 23/13 (2013.01); H01L 23/5381 (2013.01); H01L 24/14 (2013.01); H01L 24/73 (2013.01); H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H01L 25/0657 (2013.01); H01L 21/6835 (2013.01); H01L 24/17 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 24/81 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/13099 (2013.01); H01L 2224/1403 (2013.01); H01L 2224/141 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/17181 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/45099 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/49175 (2013.01); H01L 2224/73207 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/81001 (2013.01); H01L 2224/81005 (2013.01); H01L 2224/81801 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06562 (2013.01); H01L 2924/00011 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/01005 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01015 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01032 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01076 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/014 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/10271 (2013.01); H01L 2924/10329 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/19107 (2013.01); H01L 2924/351 (2013.01);
Abstract

A multi-chip package includes a substrate () having a first side (), an opposing second side (), and a third side () that extends from the first side to the second side, a first die () attached to the first side of the substrate and a second die () attached to the first side of the substrate, and a bridge () adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity () in the substrate or between the substrate and a die layer (). The bridge may constitute an active die and may be attached to the substrate using wirebonds ().


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