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For the Inventor, By the Inventor

Santa Clara, CA, United States of America

Stilian Pandev

This inventor holds 68 USPTO granted patents and 9 published patent applications and 7 EPO patents, primarily in Semiconductor Metrology (CPC class G01N). Top assignees: Kla Tencor Corporation, Kla Corporation, Kla-Tenor Corp.. Active years: 2014-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Stilian Pandev. Retrieved from https://idiyas.com/inventor/stilian-pandev

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 68 

% Patents Active = 98.5

 

Average Co-Inventor Count = 2.4

ph-index = 9

Forward Citations = 299(Granted Patents)

Forward Citations (Not Self Cited) = 198(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal46 out of 1,787 
 
Kla Tencor Corporation
 patents
silverMedal21 out of 619 
 
Kla Corporation
 patents
bronzeMedal1 out of 8 
 
Kla-Tenor Corp.
 patents

Years Active: 2014-2026

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Areas of Expertise:
Overlay Estimation
Measurement Uncertainty
Optical Inspection
Machine Learning
Spectroscopic Metrology
Process Control
Defect Classification
Hyperspectral Imaging
Calibration Tools
Recipe Optimization
Wafer Characterization
Image-Based Metrology
68 patents (USPTO):Explore Patents
1. 12694182 - Semiconductor profile measurement based on a scanning conditional model (2026-07-28),
2. 12571724 - Single wafer orientation tool-induced shift cleaning (2026-03-10),
3. 12543540 - High resolution profile measurement based on a trained parameter conditioned measurement model (2026-02-03),
4. 12535744 - Overlay estimation based on optical inspection and machine learning (2026-01-27),
5. 12523968 - System and method for estimating measurement uncertainty for characterization systems (2026-01-13),
6. 12474281 - Semiconductor measurements with robust in-line tool matching (2025-11-18),
7. 12443840 - Dynamic control of machine learning based measurement recipe optimization (2025-10-14),
8. 12422376 - Imaging reflectometry for inline screening (2025-09-23),
9. 12209854 - Methods and systems for measurement of tilt and overlay of a structure (2025-01-28),
10. 12181271 - Estimating in-die overlay with tool induced shift correction (2024-12-31),
11. 12148639 - Correcting target locations for temperature in semiconductor applications (2024-11-19),
12. 11880142 - Self-calibrating overlay metrology (2024-01-23),
13. 11796390 - Bandgap measurements of patterned film stacks using spectroscopic metrology (2023-10-24),
14. 11784097 - Measurement of overlay error using device inspection system (2023-10-10),
15. 11610297 - Tomography based semiconductor measurements using simplified models (2023-03-21),

Title: The Innovative Journey of Stilian Pandev

Introduction: Stilian Pandev, a visionary inventor based in Santa Clara, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Stilian Pandev holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his commitment to pushing the boundaries of technological advancement.

Career Highlights: With a background in computer science and engineering, Stilian Pandev has a successful track record of developing cutting-edge solutions that have revolutionized industries. His work has been recognized for its creativity and practicality.

Collaborations: Throughout his career, Stilian Pandev has collaborated with leading tech companies and research institutions to bring his ideas to life. His ability to work in multidisciplinary teams has led to the creation of innovative products that have had a lasting impact.

Conclusion: Stilian Pandev's passion for innovation and his dedication to solving complex problems have established him as a prominent figure in the world of technology. His inventive spirit continues to drive him towards new challenges and opportunities for growth.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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