IDiyas

For the Inventor, By the Inventor

Chandler, AZ, United States of America

Steve S Cho

USPTO Granted Patents = 19 

Average Co-Inventor Count = 8.1

ph-index = 3

Forward Citations = 23(Granted Patents)


Company Filing History:

goldMedal18 out of 54,664 
 
Intel Corporation
 patents
silverMedal1 out of 82 
 
Tahoe Research, Ltd.
 patents

Years Active: 2019-2025

where 'Filed Patents' based on already Granted Patents

19 patents (USPTO):
1. 12456705 - First layer interconnect first on carrier approach for EMIB patch (2025-10-28),
2. 12362250 - Protruding SN substrate features for epoxy flow control (2025-07-15),
3. 12354992 - First layer interconnect first on carrier approach for EMIB patch (2025-07-08),
4. 12341117 - Methods and apparatus to reduce defects in interconnects between semiconductor dies and package substrates (2025-06-24),
5. 12334453 - Soldered metallic reservoirs for enhanced transient and steady-state thermal performance (2025-06-17),
6. 12334422 - Methods and apparatus to reduce defects in interconnects between semicondcutor dies and package substrates (2025-06-17),
7. 12068172 - Sacrificial pads to prevent galvanic corrosion of FLI bumps in EMIB packages (2024-08-20),
8. 12009271 - Protruding SN substrate features for epoxy flow control (2024-06-11),
9. 11935857 - Surface finishes with low RBTV for fine and mixed bump pitch architectures (2024-03-19),
10. 11776864 - Corner guard for improved electroplated first level interconnect bump height range (2023-10-03),
11. 11735558 - Microelectronic structures including bridges (2023-08-22),
12. 11699648 - Electromigration resistant and profile consistent contact arrays (2023-07-11),
13. 11488918 - Surface finishes with low rBTV for fine and mixed bump pitch architectures (2022-11-01),
14. 11373972 - Microelectronic structures including bridges (2022-06-28),
15. 11309239 - Electromigration resistant and profile consistent contact arrays (2022-04-19),

Title: Steve S Cho: Innovator in Electronic Packaging Technology

Introduction

Steve S Cho is a prominent inventor based in Chandler, AZ, known for his significant contributions to electronic packaging technology. With a total of 18 patents to his name, he has made remarkable advancements in the field, particularly in underfill flow control features and integrated circuit packaging.

Latest Patents

Among his latest patents is the invention titled "Protruding SN substrate features for epoxy flow control." This patent describes electronic packages that incorporate underfill flow control features, enhancing the reliability and performance of electronic devices. Another notable patent is "First layer interconnect first on carrier approach for EMIB patch," which details a patch structure of an integrated circuit package designed to improve the bonding process between logic dies and substrates.

Career Highlights

Steve has worked with leading companies in the technology sector, including Intel Corporation and Tahoe Research, Ltd. His experience in these organizations has allowed him to develop innovative solutions that address complex challenges in electronic packaging.

Collaborations

Throughout his career, Steve has collaborated with talented professionals, including Thomas Heaton and Jung Kyu Han. These partnerships have contributed to the successful development of his patented technologies.

Conclusion

Steve S Cho's work in electronic packaging technology exemplifies the impact of innovation in the tech industry. His patents reflect a commitment to advancing the field and improving the functionality of electronic devices.

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