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For the Inventor, By the Inventor

Pleasanton, CA, United States of America

Siva Kanakasabapathy

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This inventor holds 18 USPTO granted patents. Top assignees: International Business Machines Corporation, Adeia Semiconductor Bonding Technologies Inc., Adeia Semiconductor Solutions LLC. Active years: 2010-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Siva Kanakasabapathy. Retrieved from https://idiyas.com/inventor/siva-kanakasabapathy

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 18

% Patents Active = 72.2

Average Co-Inventor Count = 4.2

ph-index = 4

Forward Citations = 41(Granted Patents)


Location History:

  • Hopewell Junction, NY (US) (2010)
  • Armonk, NY (US) (2017)
  • Pleasanton, CA (US) (2019 - 2024)

Company Filing History:

goldMedal14 out of 166,351 
 
International Business Machines Corporation
 patents
silverMedal2 out of 1,909 
 
Adeia Semiconductor Bonding Technologies Inc.
 patents
bronzeMedal1 out of 30 
 
Adeia Semiconductor Solutions LLC
 patents
4. 1 out of 5,671 
 
Globalfoundries Inc.
 patents

Years Active: 2010-2025

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18 patents (USPTO):Explore Patents
1. RE50613 - FinFET gate cut after dummy gate removal (2025-09-30),
2. 11990342 - Metal cut patterning and etching to minimize interlayer dielectric layer loss (2024-05-21),
3. 11133189 - Metal cut patterning and etching to minimize interlayer dielectric layer loss (2021-09-28),
4. 11054250 - Multi-channel overlay metrology (2021-07-06),
5. 11024715 - FinFET gate cut after dummy gate removal (2021-06-01),
6. 10741660 - Nanosheet single gate (SG) and extra gate (EG) field effect transistor (FET) co-integration (2020-08-11),
7. 10734234 - Metal cut patterning and etching to minimize interlayer dielectric layer loss (2020-08-04),
8. 10692990 - Gate cut in RMG (2020-06-23),
9. 10644129 - Gate cut in RMG (2020-05-05),
10. 10622482 - Gate cut using selective deposition to prevent oxide loss (2020-04-14),
11. 10600868 - FinFET gate cut after dummy gate removal (2020-03-24),
12. 10553700 - Gate cut in RMG (2020-02-04),
13. 10504798 - Gate cut in replacement metal gate process (2019-12-10),
14. 10347540 - Gate cut using selective deposition to prevent oxide loss (2019-07-09),
15. 10229854 - FinFET gate cut after dummy gate removal (2019-03-12),

Title: The Innovative Journey of Inventor Siva Kanakasabapathy

Introduction: Siva Kanakasabapathy, a talented inventor based in Pleasanton, CA, has made significant contributions to the field of technology through his groundbreaking innovations and patents.

Latest Patents: Siva Kanakasabapathy holds several patents in the areas of artificial intelligence, medical devices, and renewable energy technologies, showcasing his diverse range of expertise and creativity.

Career Highlights: With a background in engineering and a passion for problem-solving, Siva Kanakasabapathy has had a successful career marked by numerous achievements in developing cutting-edge solutions that have had a positive impact on various industries.

Collaborations: Throughout his career, Siva Kanakasabapathy has collaborated with leading research institutions, universities, and technology companies to bring his inventions to life and further advance the field of innovation.

Conclusion: Siva Kanakasabapathy's relentless pursuit of innovation and his commitment to pushing the boundaries of technology make him a true visionary in the world of inventions. His work continues to inspire and shape the future of technological advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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