Yokohama, Japan

Seiji Yaegashi

This inventor holds 11 USPTO granted patents. Top assignees: Sumitomo Electric Industries, Limited, Sumitomo Electric Device Innovations, Inc.. Active years: 2003-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Seiji Yaegashi. Retrieved from https://idiyas.com/inventor/seiji-yaegashi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 45.5

Average Co-Inventor Count = 4.4

ph-index = 4

Forward Citations = 37(Granted Patents)


Location History:

  • Kanagawa, JP (2003 - 2014)
  • Yokohama, JP (2003 - 2015)
  • Tokyo, JP (2014 - 2015)

Company Filing History:


Years Active: 2003-2015

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11 patents (USPTO):Explore Patents

Title: Seiji Yaegashi: Innovator in GaN-based Semiconductor Technology

Introduction

Seiji Yaegashi is a prominent inventor based in Yokohama, Japan, known for his significant contributions to semiconductor technology. With a total of 11 patents to his name, he has made remarkable advancements in the field of vertical GaN-based semiconductor devices. His work focuses on improving the performance and reliability of these devices, which are crucial for various electronic applications.

Latest Patents

One of Yaegashi's latest patents is for a vertical GaN-based semiconductor device. This innovative device enhances pinch-off characteristics and breakdown voltage characteristics by stabilizing the electric potential of a p-type GaN barrier layer. The design includes a GaN-based stacked layer with an opening, a regrown layer featuring a channel that covers the wall surface of the opening, and an n-type source layer in ohmic contact with the source electrode. Additionally, a p-type GaN barrier layer and a supplementary layer are incorporated to form a tunnel junction, effectively fixing the electric potential of the barrier layer.

Another notable patent addresses the breakdown voltage characteristics of a vertical semiconductor device that includes a channel formed of two-dimensional electron gas. This device features a GaN-based stacked layer comprising an n-type GaN drift layer, a p-type GaN barrier layer, and an n-type GaN contact layer. The design includes an opening that extends from the top layer to the n-type GaN drift layer, along with a regrown layer that covers the wall surface and bottom portion of the opening. This innovative structure aims to improve the overall performance of the semiconductor device.

Career Highlights

Throughout his career, Seiji Yaegashi has worked with esteemed companies such as Sumitomo Electric Industries, Limited and Sumitomo Electric Device Innovations, Inc. His experience in these organizations has allowed him to develop cutting-edge technologies and contribute to the advancement of semiconductor devices.

Collaborations

Yaegashi has collaborated with notable colleagues, including Masaya Okada and Makoto Kiyama. These partnerships have fostered innovation and have been instrumental in the development of his patented technologies.

Conclusion

Seiji Yaegashi's contributions to GaN-based semiconductor technology have significantly impacted the field. His innovative patents and collaborations highlight his dedication to advancing electronic device performance. His work continues to inspire future developments in semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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